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Commit dcdb318f authored by Magnus Damm's avatar Magnus Damm Committed by Paul Mundt
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ARM: mach-shmobile: sh73a0 CPGA fix for FRQCRA M3 



Fix the M3 field offset for the FRQCRA register
in the sh73a0 CPGA. It should be 12, not 8.

Signed-off-by: default avatarMagnus Damm <damm@opensource.se>
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent 39f30824

arch/arm/mach-shmobile/clock-sh73a0.c

+1 −1
Original line number Diff line number Diff line
@@ -212,7 +212,7 @@ enum { DIV4_I, DIV4_ZG, DIV4_M3, DIV4_B, DIV4_M1, DIV4_M2, 
static struct clk div4_clks[DIV4_NR] = {

	[DIV4_I] = DIV4(FRQCRA, 20, 0xfff, CLK_ENABLE_ON_INIT),

	[DIV4_ZG] = DIV4(FRQCRA, 16, 0xbff, CLK_ENABLE_ON_INIT),

	[DIV4_M3] = DIV4(FRQCRA, 8, 0xfff, CLK_ENABLE_ON_INIT),

	[DIV4_M3] = DIV4(FRQCRA, 12, 0xfff, CLK_ENABLE_ON_INIT),

	[DIV4_B] = DIV4(FRQCRA, 8, 0xfff, CLK_ENABLE_ON_INIT),

	[DIV4_M1] = DIV4(FRQCRA, 4, 0xfff, 0),

	[DIV4_M2] = DIV4(FRQCRA, 0, 0xfff, 0),