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Commit db4148da authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next-2.6

parents ef40a685 8d09a5e1

drivers/net/wireless/airo.c

+1 −1
Original line number Diff line number Diff line
@@ -7107,7 +7107,7 @@ static int airo_get_aplist(struct net_device *dev, 
 */

static int airo_set_scan(struct net_device *dev,

			 struct iw_request_info *info,

			 struct iw_param *vwrq,

			 struct iw_point *dwrq,

			 char *extra)

{

	struct airo_info *ai = dev->priv;

drivers/net/wireless/airo_cs.c

+1 −1
Original line number Diff line number Diff line
@@ -147,7 +147,7 @@ static int airo_probe(struct pcmcia_device *p_dev) 
	DEBUG(0, "airo_attach()\n");



	/* Interrupt setup */

	p_dev->irq.Attributes = IRQ_TYPE_EXCLUSIVE;

	p_dev->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING;

	p_dev->irq.IRQInfo1 = IRQ_LEVEL_ID;

	p_dev->irq.Handler = NULL;

drivers/net/wireless/ath5k/phy.c

+1 −1
Original line number Diff line number Diff line
@@ -2124,7 +2124,7 @@ static int ath5k_hw_rf5110_calibrate(struct ath5k_hw *ah, 
	beacon = ath5k_hw_reg_read(ah, AR5K_BEACON_5210);

	ath5k_hw_reg_write(ah, beacon & ~AR5K_BEACON_ENABLE, AR5K_BEACON_5210);



	udelay(2300);

	mdelay(2);



	/*

	 * Set the channel (with AGC turned off)

drivers/net/wireless/ath5k/reg.h

+0 −2
Original line number Diff line number Diff line
@@ -820,8 +820,6 @@ 
#define AR5K_RESET_CTL_MAC	0x00000004	/* MAC reset (PCU+Baseband ?) [5210] */

#define AR5K_RESET_CTL_PHY	0x00000008	/* PHY reset [5210] */

#define AR5K_RESET_CTL_PCI	0x00000010	/* PCI Core reset (interrupts etc) */

#define AR5K_RESET_CTL_CHIP	(AR5K_RESET_CTL_PCU | AR5K_RESET_CTL_DMA |	\

				AR5K_RESET_CTL_MAC | AR5K_RESET_CTL_PHY)



/*

 * Sleep control register

drivers/net/wireless/ath5k/reset.c

+13 −7
Original line number Diff line number Diff line
@@ -173,8 +173,10 @@ static int ath5k_hw_nic_reset(struct ath5k_hw *ah, u32 val) 
	udelay(15);



	if (ah->ah_version == AR5K_AR5210) {

		val &= AR5K_RESET_CTL_CHIP;

		mask &= AR5K_RESET_CTL_CHIP;

		val &= AR5K_RESET_CTL_PCU | AR5K_RESET_CTL_DMA

			| AR5K_RESET_CTL_MAC | AR5K_RESET_CTL_PHY;

		mask &= AR5K_RESET_CTL_PCU | AR5K_RESET_CTL_DMA

			| AR5K_RESET_CTL_MAC | AR5K_RESET_CTL_PHY;

	} else {

		val &= AR5K_RESET_CTL_PCU | AR5K_RESET_CTL_BASEBAND;

		mask &= AR5K_RESET_CTL_PCU | AR5K_RESET_CTL_BASEBAND;
@@ -361,16 +363,20 @@ int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial) 
	bus_flags = (pdev->is_pcie) ? 0 : AR5K_RESET_CTL_PCI;



	/* Reset chipset */

	if (ah->ah_version == AR5K_AR5210) {

		ret = ath5k_hw_nic_reset(ah, AR5K_RESET_CTL_PCU |

			AR5K_RESET_CTL_MAC | AR5K_RESET_CTL_DMA |

			AR5K_RESET_CTL_PHY | AR5K_RESET_CTL_PCI);

			mdelay(2);

	} else {

		ret = ath5k_hw_nic_reset(ah, AR5K_RESET_CTL_PCU |

			AR5K_RESET_CTL_BASEBAND | bus_flags);

	}

	if (ret) {

		ATH5K_ERR(ah->ah_sc, "failed to reset the MAC Chip\n");

		return -EIO;

	}



	if (ah->ah_version == AR5K_AR5210)

		udelay(2300);



	/* ...wakeup again!*/

	ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0);

	if (ret) {