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Commit db404e72 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'vt8500-for-next' of git://git.code.sf.net/p/linuxwmt/code into next/dt

From Tony Prisk:

Update arch-vt8500 and drivers to device tree and
remove existing non-dt code.

* tag 'vt8500-for-next' of git://git.code.sf.net/p/linuxwmt/code

:
  arm: vt8500: Update arch-vt8500 to devicetree support.
  arm: vt8500: gpio: Devicetree support for arch-vt8500
  arm: vt8500: doc: Add device tree bindings for arch-vt8500 devices
  arm: vt8500: clk: Add Common Clock Framework support
  video: vt8500: Add devicetree support for vt8500-fb and wm8505-fb
  serial: vt8500: Add devicetree support for vt8500-serial
  rtc: vt8500: Add devicetree support for vt8500-rtc
  arm: vt8500: Add device tree files for VIA/Wondermedia SoC's

Resolved add/change conflict in drivers/clk/Makefile.

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 40169a7c e9a91de7
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VIA/Wondermedia VT8500 Platforms Device Tree Bindings
---------------------------------------

Boards with the VIA VT8500 SoC shall have the following properties:
Required root node property:
compatible = "via,vt8500";

Boards with the Wondermedia WM8505 SoC shall have the following properties:
Required root node property:
compatible = "wm,wm8505";

Boards with the Wondermedia WM8650 SoC shall have the following properties:
Required root node property:
compatible = "wm,wm8650";
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VIA/Wondermedia VT8500 Interrupt Controller
-----------------------------------------------------

Required properties:
- compatible : "via,vt8500-intc"
- reg : Should contain 1 register ranges(address and length)
- #interrupt-cells : should be <1>

Example:

	intc: interrupt-controller@d8140000 {
		compatible = "via,vt8500-intc";
		interrupt-controller;
		reg = <0xd8140000 0x10000>;
		#interrupt-cells = <1>;
	};
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VIA/Wondermedia VT8500 Power Management Controller
-----------------------------------------------------

Required properties:
- compatible : "via,vt8500-pmc"
- reg : Should contain 1 register ranges(address and length)

Example:

	pmc@d8130000 {
		compatible = "via,vt8500-pmc";
		reg = <0xd8130000 0x1000>;
	};
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VIA/Wondermedia VT8500 Timer
-----------------------------------------------------

Required properties:
- compatible : "via,vt8500-timer"
- reg : Should contain 1 register ranges(address and length)
- interrupts : interrupt for the timer

Example:

	timer@d8130100 {
		compatible = "via,vt8500-timer";
		reg = <0xd8130100 0x28>;
		interrupts = <36>;
	};
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Device Tree Clock bindings for arch-vt8500

This binding uses the common clock binding[1].

[1] Documentation/devicetree/bindings/clock/clock-bindings.txt

Required properties:
- compatible : shall be one of the following:
	"via,vt8500-pll-clock" - for a VT8500/WM8505 PLL clock
	"wm,wm8650-pll-clock" - for a WM8650 PLL clock
	"via,vt8500-device-clock" - for a VT/WM device clock

Required properties for PLL clocks:
- reg : shall be the control register offset from PMC base for the pll clock.
- clocks : shall be the input parent clock phandle for the clock. This should
	be the reference clock.
- #clock-cells : from common clock binding; shall be set to 0.

Required properties for device clocks:
- clocks : shall be the input parent clock phandle for the clock. This should
	be a pll output.
- #clock-cells : from common clock binding; shall be set to 0.


Device Clocks

Device clocks are required to have one or both of the following sets of
properties:


Gated device clocks:

Required properties:
- enable-reg : shall be the register offset from PMC base for the enable
	register.
- enable-bit : shall be the bit within enable-reg to enable/disable the clock.


Divisor device clocks:

Required property:
- divisor-reg : shall be the register offset from PMC base for the divisor
	register.
Optional property:
- divisor-mask : shall be the mask for the divisor register. Defaults to 0x1f
	if not specified.


For example:

ref25: ref25M {
	#clock-cells = <0>;
	compatible = "fixed-clock";
	clock-frequency = <25000000>;
};

plla: plla {
	#clock-cells = <0>;
	compatible = "wm,wm8650-pll-clock";
	clocks = <&ref25>;
	reg = <0x200>;
};

sdhc: sdhc {
	#clock-cells = <0>;
	compatible = "via,vt8500-device-clock";
	clocks = <&pllb>;
	divisor-reg = <0x328>;
	divisor-mask = <0x3f>;
	enable-reg = <0x254>;
	enable-bit = <18>;
};
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