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Commit db3c33c6 authored by Joerg Roedel's avatar Joerg Roedel Committed by Jesse Barnes
Browse files

PCI: Move ATS implementation into own file 



ATS does not depend on IOV support, so move the code into
its own file. This file will also include support for the
PRI and PASID capabilities later.
Also give ATS its own Kconfig variable to allow selecting it
without IOV support.

Reviewed-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Signed-off-by: default avatarJoerg Roedel <joerg.roedel@amd.com>
Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
parent 78d090b0

drivers/pci/Kconfig

+4 −0
Original line number Original line Diff line number Diff line
@@ -71,9 +71,13 @@ config HT_IRQ 




	   If unsure say Y.

	   If unsure say Y.





config PCI_ATS

	bool



config PCI_IOV

config PCI_IOV

	bool "PCI IOV support"

	bool "PCI IOV support"

	depends on PCI

	depends on PCI

	select PCI_ATS

	help

	help

	  I/O Virtualization is a PCI feature supported by some devices

	  I/O Virtualization is a PCI feature supported by some devices

	  which allows them to create virtual devices which share their

	  which allows them to create virtual devices which share their

drivers/pci/Makefile

+1 −0
Original line number Original line Diff line number Diff line
@@ -29,6 +29,7 @@ obj-$(CONFIG_PCI_MSI) += msi.o 
# Build the Hypertransport interrupt support

# Build the Hypertransport interrupt support

obj-$(CONFIG_HT_IRQ) += htirq.o

obj-$(CONFIG_HT_IRQ) += htirq.o





obj-$(CONFIG_PCI_ATS) += ats.o

obj-$(CONFIG_PCI_IOV) += iov.o

obj-$(CONFIG_PCI_IOV) += iov.o





#

#

drivers/pci/ats.c

0 → 100644
+155 −0
Original line number Original line Diff line number Diff line 
/*

 * drivers/pci/ats.c

 *

 * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>

 *

 * PCI Express I/O Virtualization (IOV) support.

 *   Address Translation Service 1.0

 */



#include <linux/pci-ats.h>

#include <linux/pci.h>



#include "pci.h"



static int ats_alloc_one(struct pci_dev *dev, int ps)

{

	int pos;

	u16 cap;

	struct pci_ats *ats;



	pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ATS);

	if (!pos)

		return -ENODEV;



	ats = kzalloc(sizeof(*ats), GFP_KERNEL);

	if (!ats)

		return -ENOMEM;



	ats->pos = pos;

	ats->stu = ps;

	pci_read_config_word(dev, pos + PCI_ATS_CAP, &cap);

	ats->qdep = PCI_ATS_CAP_QDEP(cap) ? PCI_ATS_CAP_QDEP(cap) :

					    PCI_ATS_MAX_QDEP;

	dev->ats = ats;



	return 0;

}



static void ats_free_one(struct pci_dev *dev)

{

	kfree(dev->ats);

	dev->ats = NULL;

}



/**

 * pci_enable_ats - enable the ATS capability

 * @dev: the PCI device

 * @ps: the IOMMU page shift

 *

 * Returns 0 on success, or negative on failure.

 */

int pci_enable_ats(struct pci_dev *dev, int ps)

{

	int rc;

	u16 ctrl;



	BUG_ON(dev->ats && dev->ats->is_enabled);



	if (ps < PCI_ATS_MIN_STU)

		return -EINVAL;



	if (dev->is_physfn || dev->is_virtfn) {

		struct pci_dev *pdev = dev->is_physfn ? dev : dev->physfn;



		mutex_lock(&pdev->sriov->lock);

		if (pdev->ats)

			rc = pdev->ats->stu == ps ? 0 : -EINVAL;

		else

			rc = ats_alloc_one(pdev, ps);



		if (!rc)

			pdev->ats->ref_cnt++;

		mutex_unlock(&pdev->sriov->lock);

		if (rc)

			return rc;

	}



	if (!dev->is_physfn) {

		rc = ats_alloc_one(dev, ps);

		if (rc)

			return rc;

	}



	ctrl = PCI_ATS_CTRL_ENABLE;

	if (!dev->is_virtfn)

		ctrl |= PCI_ATS_CTRL_STU(ps - PCI_ATS_MIN_STU);

	pci_write_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, ctrl);



	dev->ats->is_enabled = 1;



	return 0;

}



/**

 * pci_disable_ats - disable the ATS capability

 * @dev: the PCI device

 */

void pci_disable_ats(struct pci_dev *dev)

{

	u16 ctrl;



	BUG_ON(!dev->ats || !dev->ats->is_enabled);



	pci_read_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, &ctrl);

	ctrl &= ~PCI_ATS_CTRL_ENABLE;

	pci_write_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, ctrl);



	dev->ats->is_enabled = 0;



	if (dev->is_physfn || dev->is_virtfn) {

		struct pci_dev *pdev = dev->is_physfn ? dev : dev->physfn;



		mutex_lock(&pdev->sriov->lock);

		pdev->ats->ref_cnt--;

		if (!pdev->ats->ref_cnt)

			ats_free_one(pdev);

		mutex_unlock(&pdev->sriov->lock);

	}



	if (!dev->is_physfn)

		ats_free_one(dev);

}



/**

 * pci_ats_queue_depth - query the ATS Invalidate Queue Depth

 * @dev: the PCI device

 *

 * Returns the queue depth on success, or negative on failure.

 *

 * The ATS spec uses 0 in the Invalidate Queue Depth field to

 * indicate that the function can accept 32 Invalidate Request.

 * But here we use the `real' values (i.e. 1~32) for the Queue

 * Depth; and 0 indicates the function shares the Queue with

 * other functions (doesn't exclusively own a Queue).

 */

int pci_ats_queue_depth(struct pci_dev *dev)

{

	int pos;

	u16 cap;



	if (dev->is_virtfn)

		return 0;



	if (dev->ats)

		return dev->ats->qdep;



	pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ATS);

	if (!pos)

		return -ENODEV;



	pci_read_config_word(dev, pos + PCI_ATS_CAP, &cap);



	return PCI_ATS_CAP_QDEP(cap) ? PCI_ATS_CAP_QDEP(cap) :

				       PCI_ATS_MAX_QDEP;

}

drivers/pci/iov.c

+0 −142
Original line number Original line Diff line number Diff line
@@ -722,145 +722,3 @@ int pci_num_vf(struct pci_dev *dev) 
		return dev->sriov->nr_virtfn;

		return dev->sriov->nr_virtfn;

}

}

EXPORT_SYMBOL_GPL(pci_num_vf);
 
EXPORT_SYMBOL_GPL(pci_num_vf);
 


static int ats_alloc_one(struct pci_dev *dev, int ps)

{

	int pos;

	u16 cap;

	struct pci_ats *ats;



	pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ATS);

	if (!pos)

		return -ENODEV;



	ats = kzalloc(sizeof(*ats), GFP_KERNEL);

	if (!ats)

		return -ENOMEM;



	ats->pos = pos;

	ats->stu = ps;

	pci_read_config_word(dev, pos + PCI_ATS_CAP, &cap);

	ats->qdep = PCI_ATS_CAP_QDEP(cap) ? PCI_ATS_CAP_QDEP(cap) :

					    PCI_ATS_MAX_QDEP;

	dev->ats = ats;



	return 0;

}



static void ats_free_one(struct pci_dev *dev)

{

	kfree(dev->ats);

	dev->ats = NULL;

}



/**

 * pci_enable_ats - enable the ATS capability

 * @dev: the PCI device

 * @ps: the IOMMU page shift

 *

 * Returns 0 on success, or negative on failure.

 */

int pci_enable_ats(struct pci_dev *dev, int ps)

{

	int rc;

	u16 ctrl;



	BUG_ON(dev->ats && dev->ats->is_enabled);



	if (ps < PCI_ATS_MIN_STU)

		return -EINVAL;



	if (dev->is_physfn || dev->is_virtfn) {

		struct pci_dev *pdev = dev->is_physfn ? dev : dev->physfn;



		mutex_lock(&pdev->sriov->lock);

		if (pdev->ats)

			rc = pdev->ats->stu == ps ? 0 : -EINVAL;

		else

			rc = ats_alloc_one(pdev, ps);



		if (!rc)

			pdev->ats->ref_cnt++;

		mutex_unlock(&pdev->sriov->lock);

		if (rc)

			return rc;

	}



	if (!dev->is_physfn) {

		rc = ats_alloc_one(dev, ps);

		if (rc)

			return rc;

	}



	ctrl = PCI_ATS_CTRL_ENABLE;

	if (!dev->is_virtfn)

		ctrl |= PCI_ATS_CTRL_STU(ps - PCI_ATS_MIN_STU);

	pci_write_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, ctrl);



	dev->ats->is_enabled = 1;



	return 0;

}



/**

 * pci_disable_ats - disable the ATS capability

 * @dev: the PCI device

 */

void pci_disable_ats(struct pci_dev *dev)

{

	u16 ctrl;



	BUG_ON(!dev->ats || !dev->ats->is_enabled);



	pci_read_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, &ctrl);

	ctrl &= ~PCI_ATS_CTRL_ENABLE;

	pci_write_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, ctrl);



	dev->ats->is_enabled = 0;



	if (dev->is_physfn || dev->is_virtfn) {

		struct pci_dev *pdev = dev->is_physfn ? dev : dev->physfn;



		mutex_lock(&pdev->sriov->lock);

		pdev->ats->ref_cnt--;

		if (!pdev->ats->ref_cnt)

			ats_free_one(pdev);

		mutex_unlock(&pdev->sriov->lock);

	}



	if (!dev->is_physfn)

		ats_free_one(dev);

}



/**

 * pci_ats_queue_depth - query the ATS Invalidate Queue Depth

 * @dev: the PCI device

 *

 * Returns the queue depth on success, or negative on failure.

 *

 * The ATS spec uses 0 in the Invalidate Queue Depth field to

 * indicate that the function can accept 32 Invalidate Request.

 * But here we use the `real' values (i.e. 1~32) for the Queue

 * Depth; and 0 indicates the function shares the Queue with

 * other functions (doesn't exclusively own a Queue).

 */

int pci_ats_queue_depth(struct pci_dev *dev)

{

	int pos;

	u16 cap;



	if (dev->is_virtfn)

		return 0;



	if (dev->ats)

		return dev->ats->qdep;



	pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ATS);

	if (!pos)

		return -ENODEV;



	pci_read_config_word(dev, pos + PCI_ATS_CAP, &cap);



	return PCI_ATS_CAP_QDEP(cap) ? PCI_ATS_CAP_QDEP(cap) :

				       PCI_ATS_MAX_QDEP;

}

include/linux/pci-ats.h

+2 −0
Original line number Original line Diff line number Diff line 
#ifndef LINUX_PCI_ATS_H

#ifndef LINUX_PCI_ATS_H

#define LINUX_PCI_ATS_H

#define LINUX_PCI_ATS_H





#include <linux/pci.h>



/* Address Translation Service */

/* Address Translation Service */

struct pci_ats {

struct pci_ats {

	int pos;        /* capability position */

	int pos;        /* capability position */