Loading arch/arm/mach-omap1/io.c +3 −3 Original line number Diff line number Diff line Loading @@ -29,9 +29,9 @@ extern void omapfb_reserve_sdram(void); */ static struct map_desc omap_io_desc[] __initdata = { { .virtual = IO_VIRT, .pfn = __phys_to_pfn(IO_PHYS), .length = IO_SIZE, .virtual = OMAP1_IO_VIRT, .pfn = __phys_to_pfn(OMAP1_IO_PHYS), .length = OMAP1_IO_SIZE, .type = MT_DEVICE } }; Loading arch/arm/plat-omap/include/mach/io.h +29 −8 Original line number Diff line number Diff line Loading @@ -66,13 +66,21 @@ #define OMAP2_IO_OFFSET 0x90000000 #define OMAP2_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_IO_OFFSET) /* L3 and L4 */ #if defined(CONFIG_ARCH_OMAP1) /* * ---------------------------------------------------------------------------- * Omap1 specific IO mapping * ---------------------------------------------------------------------------- */ #define IO_PHYS 0xFFFB0000 #define IO_SIZE 0x40000 #define IO_VIRT (IO_PHYS - OMAP1_IO_OFFSET) #define OMAP1_IO_PHYS 0xFFFB0000 #define OMAP1_IO_SIZE 0x40000 #define OMAP1_IO_VIRT (OMAP1_IO_PHYS - OMAP1_IO_OFFSET) #elif defined(CONFIG_ARCH_OMAP2) /* * ---------------------------------------------------------------------------- * Omap2 specific IO mapping * ---------------------------------------------------------------------------- */ /* We map both L3 and L4 on OMAP2 */ #define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 */ Loading Loading @@ -106,7 +114,11 @@ #define DSP_MMU_24XX_VIRT 0xe2000000 #define DSP_MMU_24XX_SIZE SZ_4K #elif defined(CONFIG_ARCH_OMAP3) /* * ---------------------------------------------------------------------------- * Omap3 specific IO mapping * ---------------------------------------------------------------------------- */ /* We map both L3 and L4 on OMAP3 */ #define L3_34XX_PHYS L3_34XX_BASE /* 0x68000000 */ Loading Loading @@ -157,8 +169,12 @@ #define DSP_MMU_34XX_VIRT 0xe2000000 #define DSP_MMU_34XX_SIZE SZ_4K /* * ---------------------------------------------------------------------------- * Omap4 specific IO mapping * ---------------------------------------------------------------------------- */ #elif defined(CONFIG_ARCH_OMAP4) /* We map both L3 and L4 on OMAP4 */ #define L3_44XX_PHYS L3_44XX_BASE #define L3_44XX_VIRT 0xd4000000 Loading @@ -185,7 +201,12 @@ #define OMAP44XX_GPMC_VIRT 0xe0000000 #define OMAP44XX_GPMC_SIZE SZ_1M #endif /* * ---------------------------------------------------------------------------- * Omap specific register access * ---------------------------------------------------------------------------- */ #ifndef __ASSEMBLER__ Loading arch/arm/plat-omap/io.c +2 −2 Original line number Diff line number Diff line Loading @@ -30,8 +30,8 @@ void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type) { #ifdef CONFIG_ARCH_OMAP1 if (cpu_class_is_omap1()) { if (BETWEEN(p, IO_PHYS, IO_SIZE)) return XLATE(p, IO_PHYS, IO_VIRT); if (BETWEEN(p, OMAP1_IO_PHYS, OMAP1_IO_SIZE)) return XLATE(p, OMAP1_IO_PHYS, OMAP1_IO_VIRT); } if (cpu_is_omap730()) { if (BETWEEN(p, OMAP730_DSP_BASE, OMAP730_DSP_SIZE)) Loading Loading
arch/arm/mach-omap1/io.c +3 −3 Original line number Diff line number Diff line Loading @@ -29,9 +29,9 @@ extern void omapfb_reserve_sdram(void); */ static struct map_desc omap_io_desc[] __initdata = { { .virtual = IO_VIRT, .pfn = __phys_to_pfn(IO_PHYS), .length = IO_SIZE, .virtual = OMAP1_IO_VIRT, .pfn = __phys_to_pfn(OMAP1_IO_PHYS), .length = OMAP1_IO_SIZE, .type = MT_DEVICE } }; Loading
arch/arm/plat-omap/include/mach/io.h +29 −8 Original line number Diff line number Diff line Loading @@ -66,13 +66,21 @@ #define OMAP2_IO_OFFSET 0x90000000 #define OMAP2_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_IO_OFFSET) /* L3 and L4 */ #if defined(CONFIG_ARCH_OMAP1) /* * ---------------------------------------------------------------------------- * Omap1 specific IO mapping * ---------------------------------------------------------------------------- */ #define IO_PHYS 0xFFFB0000 #define IO_SIZE 0x40000 #define IO_VIRT (IO_PHYS - OMAP1_IO_OFFSET) #define OMAP1_IO_PHYS 0xFFFB0000 #define OMAP1_IO_SIZE 0x40000 #define OMAP1_IO_VIRT (OMAP1_IO_PHYS - OMAP1_IO_OFFSET) #elif defined(CONFIG_ARCH_OMAP2) /* * ---------------------------------------------------------------------------- * Omap2 specific IO mapping * ---------------------------------------------------------------------------- */ /* We map both L3 and L4 on OMAP2 */ #define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 */ Loading Loading @@ -106,7 +114,11 @@ #define DSP_MMU_24XX_VIRT 0xe2000000 #define DSP_MMU_24XX_SIZE SZ_4K #elif defined(CONFIG_ARCH_OMAP3) /* * ---------------------------------------------------------------------------- * Omap3 specific IO mapping * ---------------------------------------------------------------------------- */ /* We map both L3 and L4 on OMAP3 */ #define L3_34XX_PHYS L3_34XX_BASE /* 0x68000000 */ Loading Loading @@ -157,8 +169,12 @@ #define DSP_MMU_34XX_VIRT 0xe2000000 #define DSP_MMU_34XX_SIZE SZ_4K /* * ---------------------------------------------------------------------------- * Omap4 specific IO mapping * ---------------------------------------------------------------------------- */ #elif defined(CONFIG_ARCH_OMAP4) /* We map both L3 and L4 on OMAP4 */ #define L3_44XX_PHYS L3_44XX_BASE #define L3_44XX_VIRT 0xd4000000 Loading @@ -185,7 +201,12 @@ #define OMAP44XX_GPMC_VIRT 0xe0000000 #define OMAP44XX_GPMC_SIZE SZ_1M #endif /* * ---------------------------------------------------------------------------- * Omap specific register access * ---------------------------------------------------------------------------- */ #ifndef __ASSEMBLER__ Loading
arch/arm/plat-omap/io.c +2 −2 Original line number Diff line number Diff line Loading @@ -30,8 +30,8 @@ void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type) { #ifdef CONFIG_ARCH_OMAP1 if (cpu_class_is_omap1()) { if (BETWEEN(p, IO_PHYS, IO_SIZE)) return XLATE(p, IO_PHYS, IO_VIRT); if (BETWEEN(p, OMAP1_IO_PHYS, OMAP1_IO_SIZE)) return XLATE(p, OMAP1_IO_PHYS, OMAP1_IO_VIRT); } if (cpu_is_omap730()) { if (BETWEEN(p, OMAP730_DSP_BASE, OMAP730_DSP_SIZE)) Loading