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Commit daf7b765 authored by Naseer Ahmed's avatar Naseer Ahmed Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: QPIC display configuration for 9x07 



Added new dts file for QPIC display module and
updated pinctrl dts to include QPIC display pin
configurations
ported devicetree documentation for qpic from 3.10

Change-Id: Idc79a46df8e6cb931f0266c363578cb8bcb7b0b3
Signed-off-by: default avatarNaseer Ahmed <naseer@codeaurora.org>
parent e5fd6614

Documentation/devicetree/bindings/fb/mdss-qpic-panel.txt

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Qualcomm Technologies, Inc. mdss-qpic-panel



mdss-qpic-panel is a panel device which can be driven by qpic.



Required properties:

- compatible:				Must be "qcom,mdss-qpic-panel"

- qcom,mdss-pan-res:		A two dimensional array that specifies the panel

							resolution.

- qcom,mdss-pan-bpp:		Specifies the panel bits per pixel.

- qcom,refresh_rate:		Panel refresh rate



Optional properties:

- label:					A string used as a descriptive name of the panel





Example:

/ {

	qcom,mdss_lcdc_ili9341_qvga {

		compatible = "qcom,mdss-qpic-panel";

		label = "ili qvga lcdc panel";

		qcom,mdss-pan-res = <240 320>;

		qcom,mdss-pan-bpp = <18>;

		qcom,refresh_rate = <60>;

	};

};

Documentation/devicetree/bindings/fb/mdss-qpic.txt

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Qualcomm Technolgies, Inc.  mdss-qpic



mdss-qpic is a qpic controller device which supports dma transmission to MIPI

and LCDC panel.



Required properties:

- compatible:			must be "qcom,mdss_qpic"

- reg:					offset and length of the register set for the device.

- reg-names :			names to refer to register sets related to this device

- interrupts:			IRQ line

- vdd-supply:			Phandle for vdd regulator device node.

- avdd-supply:			Phandle for avdd regulator device node.

- qcom,cs-gpio:			Phandle for cs gpio device node.

- qcom,te-gpio:			Phandle for te gpio device node.

- qcom,rst-gpio:		Phandle for rst gpio device node.

- qcom,ad8-gpio:		Phandle for ad8 gpio device node.

- qcom,bl-gpio:			Phandle for backlight gpio device node.



Optional properties:

- Refer to "Documentation/devicetree/bindings/arm/msm/msm_bus.txt" for

below Bus Scaling properties:

	- qcom,msm-bus,name

	- qcom,msm-bus,num-cases

	- qcom,msm-bus,num-paths

	- qcom,msm-bus,vectors-KBps



Example:

	qcom,msm_qpic@f9ac0000 {

		compatible = "qcom,mdss_qpic";

		reg = <0xf9ac0000 0x24000>;

		reg-names = "qpic_base";

		interrupts = <0 251 0>;



		qcom,msm-bus,name = "mdss_qpic";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,num-paths = <1>;



		qcom,msm-bus,vectors-KBps =

			<91 512 0 0>,

			<91 512 400000 800000>;



		vdd-supply = <&pm8019_l11>;

		avdd-supply = <&pm8019_l14>;

		qcom,cs-gpio = <&msmgpio 21 0>;

		qcom,te-gpio = <&msmgpio 22 0>;

		qcom,rst-gpio = <&msmgpio 23 0>;

		qcom,ad8-gpio = <&msmgpio 20 0>;

		qcom,bl-gpio = <&msmgpio 84 0>;

	};

arch/arm/boot/dts/qcom/mdm9607-cdp.dtsi

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@@ -13,6 +13,8 @@ 


#include "mdm9607.dtsi"

#include "mdm9607-pinctrl.dtsi"

#include "mdm9607-display.dtsi"

#include "qpic-panel-ili-hvga.dtsi"



/ {

	bluetooth: bt_qca6174 {
@@ -172,3 +174,13 @@ 


	status = "disabled";

};



/* Display */

&mdss_qpic {

	pinctrl-names= "mdss_default", "mdss_sleep";

	pinctrl-0 = <&mdss_ldo_active &mdss_cs_active &mdss_te_active

		&mdss_rs_active &mdss_ad_active &mdss_bl_active>;

	pinctrl-1 = <&mdss_ldo_sleep &mdss_cs_sleep &mdss_te_sleep

		&mdss_rs_sleep &mdss_ad_sleep &mdss_bl_sleep>;

	status = "disabled";

};

arch/arm/boot/dts/qcom/mdm9607-display.dtsi

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/* Copyright (c) 2015, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



/ {

	mdss_qpic: qcom,msm_qpic@7980000 {

		compatible = "qcom,mdss_qpic";

		reg = <0x7980000 0x24000>;

		reg-names = "qpic_base";

		interrupts = <0 251 0>;



		qcom,msm-bus,name = "mdss_qpic";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,num-paths = <1>;



		qcom,msm-bus,vectors-KBps =

			<91 512 0 0>,

			/* Voting for max b/w on PNOC bus for now */

			<91 512 400000 800000>;



		vdd-supply = <&mdm9607_l11>;



		clock-names = "core_a_clk";

		clocks = <&clock_gcc clk_qpic_a_clk>;



	};

};

arch/arm/boot/dts/qcom/mdm9607-pinctrl.dtsi

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@@ -733,5 +733,165 @@ 
				};

			};

		};



		mdss_cs_active: mdss_cs_active {

			mux {

				pins = "gpio23";

				function = "ebi2_lcd_cs_n_b";

			};



			config {

				pins = "gpio23";

				drive-strength = <10>;/*10mA*/

				bias-disable;/*NOpull*/

			};

		};



		mdss_cs_sleep:mdss_cs_sleep {

			mux {

				pins = "gpio23";

				function = "ebi2_lcd_cs_n_b";

			};



			config {

				pins = "gpio23";

				drive-strength = <10>;/*2mA*/

				bias-disable;/*NOpull*/

			};

		};



		mdss_te_active:mdss_te_active {

			mux {

				pins = "gpio20";

				function = "ebi2_lcd_te_b";

			};



			config {

				pins = "gpio20";

				drive-strength = <10>;/*10mA*/

				bias-disable;/*NOpull*/

			};

		};



		mdss_te_sleep:mdss_te_sleep {

			mux {

				pins = "gpio20";

				function = "ebi2_lcd_te_b";

			};



			config {

				pins = "gpio20";

				drive-strength = <10>;/*2mA*/

				bias-disable;/*NOpull*/

			};

		};



		mdss_rs_active:mdss_rs_active {

			mux {

				pins = "gpio74";

				function = "ebi2_lcd";

			};



			config {

				pins = "gpio74";

				drive-strength = <10>;/*10mA*/

				bias-disable;/*NOpull*/

			};

		};



		mdss_rs_sleep:mdss_rs_sleep {

			mux {

				pins = "gpio74";

				function = "ebi2_lcd";

			};



			config {

				pins = "gpio74";

				drive-strength = <10>;/*2mA*/

				bias-disable;/*NOpull*/

			};

		};



		mdss_ad_active:mdss_ad_active {

			mux {

				pins = "gpio22";

				function = "ebi2_a_d_8_b";

			};



			config {

				pins = "gpio22";

				drive-strength = <10>;/*10mA*/

				bias-disable;/*NOpull*/

			};

		};



		mdss_ad_sleep:mdss_ad_sleep {

			mux {

				pins = "gpio22";

				function = "ebi2_a_d_8_b";

			};



			config {

				pins = "gpio22";

				drive-strength = <10>;/*2mA*/

				bias-disable;/*NOpull*/

			};

		};



		mdss_bl_active:mdss_bl_active {

			mux {

				pins = "gpio21";

				function = "gpio";

			};



			config {

				pins = "gpio21";

				drive-strength = <10>;/*10mA*/

				bias-disable;/*NOpull*/

				output-high;

			};

		};



		mdss_bl_sleep:mdss_bl_sleep {

			mux {

				pins = "gpio21";

				function = "gpio";

			};



			config {

				pins = "gpio21";

				drive-strength = <10>;/*2mA*/

				bias-disable;/*NOpull*/

				output-high;

			};

		};



		mdss_ldo_active:mdss_ldo_active {

			mux {

				pins = "gpio10";

				function = "gpio";

			};



			config {

				pins = "gpio10";

				drive-strength = <10>;/*10mA*/

				bias-disable;/*NOpull*/

				output-high;

			};

		};



		mdss_ldo_sleep:mdss_ldo_sleep {

			mux {

				pins = "gpio10";

				function = "gpio";

			};



			config {

				pins = "gpio10";

				drive-strength = <10>;/*2mA*/

				bias-disable;/*NOpull*/

				output-low;

			};

		};

	};

};