Loading drivers/gpu/msm/adreno.h +15 −0 Original line number Diff line number Diff line Loading @@ -352,6 +352,8 @@ struct adreno_device { * @ADRENO_DEVICE_PREEMPTION - Turn on/off preemption * @ADRENO_DEVICE_SOFT_FAULT_DETECT - Set if soft fault detect is enabled * @ADRENO_DEVICE_GPMU_INITIALIZED - Set if GPMU firmware initialization succeed * @ADRENO_DEVICE_ISDB_ENABLED - Set if the Integrated Shader DeBugger is * attached and enabled */ enum adreno_device_flags { ADRENO_DEVICE_PWRON = 0, Loading @@ -366,6 +368,7 @@ enum adreno_device_flags { ADRENO_DEVICE_PREEMPTION = 9, ADRENO_DEVICE_SOFT_FAULT_DETECT = 10, ADRENO_DEVICE_GPMU_INITIALIZED = 11, ADRENO_DEVICE_ISDB_ENABLED = 12, }; /** Loading Loading @@ -1339,4 +1342,16 @@ static inline uint _hi_32(uint64_t val) return (uint) ((val >> 32) & 0xFFFFFFFF); } static inline bool adreno_soft_fault_detect(struct adreno_device *adreno_dev) { return adreno_dev->fast_hang_detect && !test_bit(ADRENO_DEVICE_ISDB_ENABLED, &adreno_dev->priv); } static inline bool adreno_long_ib_detect(struct adreno_device *adreno_dev) { return adreno_dev->long_ib_detect && !test_bit(ADRENO_DEVICE_ISDB_ENABLED, &adreno_dev->priv); } #endif /*__ADRENO_H */ drivers/gpu/msm/adreno_a5xx.c +34 −5 Original line number Diff line number Diff line Loading @@ -1360,10 +1360,6 @@ static void a5xx_start(struct adreno_device *adreno_dev) */ kgsl_regwrite(device, A5XX_RBBM_AHB_CNTL0, 0x00000001); /* Enable AHB error reporting */ kgsl_regwrite(device, A5XX_RBBM_AHB_CNTL1, 0xA6FFFFFF); kgsl_regwrite(device, A5XX_RBBM_AHB_CNTL2, 0x0000003F); /* * Turn on hang detection for a530 v2 and beyond. This spews a * lot of useful information into the RBBM registers on a hang. Loading Loading @@ -1475,7 +1471,40 @@ static void a5xx_start(struct adreno_device *adreno_dev) /* Set the USE_RETENTION_FLOPS chicken bit */ kgsl_regwrite(device, A5XX_CP_CHICKEN_DBG, 0x02000000); /* Enable ISDB mode if requested */ if (test_bit(ADRENO_DEVICE_ISDB_ENABLED, &adreno_dev->priv)) { if (!kgsl_active_count_get(device)) { /* * Disable ME/PFP split timeouts when the debugger is * enabled because the CP doesn't know when a shader is * in active debug */ kgsl_regwrite(device, A5XX_RBBM_AHB_CNTL1, 0x06FFFFFF); /* Force the SP0/SP1 clocks on to enable ISDB */ kgsl_regwrite(device, A5XX_RBBM_CLOCK_CNTL_SP0, 0x0); kgsl_regwrite(device, A5XX_RBBM_CLOCK_CNTL_SP1, 0x0); kgsl_regwrite(device, A5XX_RBBM_CLOCK_CNTL_SP2, 0x0); kgsl_regwrite(device, A5XX_RBBM_CLOCK_CNTL_SP3, 0x0); kgsl_regwrite(device, A5XX_RBBM_CLOCK_CNTL2_SP0, 0x0); kgsl_regwrite(device, A5XX_RBBM_CLOCK_CNTL2_SP1, 0x0); kgsl_regwrite(device, A5XX_RBBM_CLOCK_CNTL2_SP2, 0x0); kgsl_regwrite(device, A5XX_RBBM_CLOCK_CNTL2_SP3, 0x0); /* disable HWCG */ kgsl_regwrite(device, A5XX_RBBM_CLOCK_CNTL, 0x0); kgsl_regwrite(device, A5XX_RBBM_ISDB_CNT, 0x0); } else KGSL_CORE_ERR( "Active count failed while turning on ISDB."); } else { /* if not in ISDB mode enable ME/PFP split notification */ kgsl_regwrite(device, A5XX_RBBM_AHB_CNTL1, 0xA6FFFFFF); /* enable HWCG */ a5xx_hwcg_init(adreno_dev); } kgsl_regwrite(device, A5XX_RBBM_AHB_CNTL2, 0x0000003F); if (adreno_is_preemption_enabled(adreno_dev)) { def_ttbr0 = kgsl_mmu_get_default_ttbr0(&device->mmu, Loading drivers/gpu/msm/adreno_debugfs.c +39 −0 Original line number Diff line number Diff line Loading @@ -22,6 +22,41 @@ #include "kgsl_cffdump.h" #include "kgsl_sync.h" static int _isdb_set(void *data, u64 val) { struct kgsl_device *device = data; struct adreno_device *adreno_dev = ADRENO_DEVICE(device); /* Once ISDB goes enabled it stays enabled */ if (test_bit(ADRENO_DEVICE_ISDB_ENABLED, &adreno_dev->priv)) return 0; mutex_lock(&device->mutex); /* * Bring down the GPU so we can bring it back up with the correct power * and clock settings */ kgsl_pwrctrl_change_state(device, KGSL_STATE_SUSPEND); set_bit(ADRENO_DEVICE_ISDB_ENABLED, &adreno_dev->priv); kgsl_pwrctrl_change_state(device, KGSL_STATE_SLUMBER); mutex_unlock(&device->mutex); return 0; } static int _isdb_get(void *data, u64 *val) { struct kgsl_device *device = data; struct adreno_device *adreno_dev = ADRENO_DEVICE(device); *val = (u64) test_bit(ADRENO_DEVICE_ISDB_ENABLED, &adreno_dev->priv); return 0; } DEFINE_SIMPLE_ATTRIBUTE(_isdb_fops, _isdb_get, _isdb_set, "%llu\n"); static int _active_count_get(void *data, u64 *val) { struct kgsl_device *device = data; Loading Loading @@ -278,4 +313,8 @@ void adreno_debugfs_init(struct adreno_device *adreno_dev) &_active_count_fops); adreno_dev->ctx_d_debugfs = debugfs_create_dir("ctx", device->d_debugfs); if (adreno_is_a5xx(adreno_dev)) debugfs_create_file("isdb", 0644, device->d_debugfs, device, &_isdb_fops); } drivers/gpu/msm/adreno_dispatch.c +5 −5 Original line number Diff line number Diff line Loading @@ -251,8 +251,7 @@ static void start_fault_timer(struct adreno_device *adreno_dev) { struct adreno_dispatcher *dispatcher = &adreno_dev->dispatcher; if (test_bit(ADRENO_DEVICE_SOFT_FAULT_DETECT, &adreno_dev->priv) && adreno_dev->fast_hang_detect) if (adreno_soft_fault_detect(adreno_dev)) mod_timer(&dispatcher->fault_timer, jiffies + msecs_to_jiffies(_fault_timer_interval)); } Loading Loading @@ -2027,7 +2026,8 @@ static void adreno_dispatcher_work(struct work_struct *work) /* process the active q*/ count = adreno_dispatch_process_cmdqueue(adreno_dev, &(adreno_dev->cur_rb->dispatch_q), adreno_dev->long_ib_detect); adreno_long_ib_detect(adreno_dev)); else if (ADRENO_DISPATCHER_PREEMPT_TRIGGERED == atomic_read(&dispatcher->preemption_state)) count = adreno_dispatch_process_cmdqueue(adreno_dev, Loading @@ -2045,7 +2045,7 @@ static void adreno_dispatcher_work(struct work_struct *work) /* active level switched, clear new level cmdbatches */ count = adreno_dispatch_process_cmdqueue(adreno_dev, dispatch_q, adreno_dev->long_ib_detect); adreno_long_ib_detect(adreno_dev)); /* * If GPU has already completed all the commands in new incoming * RB then we may not get another interrupt due to which Loading Loading @@ -2148,7 +2148,7 @@ static void adreno_dispatcher_fault_timer(unsigned long data) struct adreno_dispatcher *dispatcher = &adreno_dev->dispatcher; /* Leave if the user decided to turn off fast hang detection */ if (adreno_dev->fast_hang_detect == 0) if (!adreno_soft_fault_detect(adreno_dev)) return; if (adreno_gpu_fault(adreno_dev)) { Loading Loading
drivers/gpu/msm/adreno.h +15 −0 Original line number Diff line number Diff line Loading @@ -352,6 +352,8 @@ struct adreno_device { * @ADRENO_DEVICE_PREEMPTION - Turn on/off preemption * @ADRENO_DEVICE_SOFT_FAULT_DETECT - Set if soft fault detect is enabled * @ADRENO_DEVICE_GPMU_INITIALIZED - Set if GPMU firmware initialization succeed * @ADRENO_DEVICE_ISDB_ENABLED - Set if the Integrated Shader DeBugger is * attached and enabled */ enum adreno_device_flags { ADRENO_DEVICE_PWRON = 0, Loading @@ -366,6 +368,7 @@ enum adreno_device_flags { ADRENO_DEVICE_PREEMPTION = 9, ADRENO_DEVICE_SOFT_FAULT_DETECT = 10, ADRENO_DEVICE_GPMU_INITIALIZED = 11, ADRENO_DEVICE_ISDB_ENABLED = 12, }; /** Loading Loading @@ -1339,4 +1342,16 @@ static inline uint _hi_32(uint64_t val) return (uint) ((val >> 32) & 0xFFFFFFFF); } static inline bool adreno_soft_fault_detect(struct adreno_device *adreno_dev) { return adreno_dev->fast_hang_detect && !test_bit(ADRENO_DEVICE_ISDB_ENABLED, &adreno_dev->priv); } static inline bool adreno_long_ib_detect(struct adreno_device *adreno_dev) { return adreno_dev->long_ib_detect && !test_bit(ADRENO_DEVICE_ISDB_ENABLED, &adreno_dev->priv); } #endif /*__ADRENO_H */
drivers/gpu/msm/adreno_a5xx.c +34 −5 Original line number Diff line number Diff line Loading @@ -1360,10 +1360,6 @@ static void a5xx_start(struct adreno_device *adreno_dev) */ kgsl_regwrite(device, A5XX_RBBM_AHB_CNTL0, 0x00000001); /* Enable AHB error reporting */ kgsl_regwrite(device, A5XX_RBBM_AHB_CNTL1, 0xA6FFFFFF); kgsl_regwrite(device, A5XX_RBBM_AHB_CNTL2, 0x0000003F); /* * Turn on hang detection for a530 v2 and beyond. This spews a * lot of useful information into the RBBM registers on a hang. Loading Loading @@ -1475,7 +1471,40 @@ static void a5xx_start(struct adreno_device *adreno_dev) /* Set the USE_RETENTION_FLOPS chicken bit */ kgsl_regwrite(device, A5XX_CP_CHICKEN_DBG, 0x02000000); /* Enable ISDB mode if requested */ if (test_bit(ADRENO_DEVICE_ISDB_ENABLED, &adreno_dev->priv)) { if (!kgsl_active_count_get(device)) { /* * Disable ME/PFP split timeouts when the debugger is * enabled because the CP doesn't know when a shader is * in active debug */ kgsl_regwrite(device, A5XX_RBBM_AHB_CNTL1, 0x06FFFFFF); /* Force the SP0/SP1 clocks on to enable ISDB */ kgsl_regwrite(device, A5XX_RBBM_CLOCK_CNTL_SP0, 0x0); kgsl_regwrite(device, A5XX_RBBM_CLOCK_CNTL_SP1, 0x0); kgsl_regwrite(device, A5XX_RBBM_CLOCK_CNTL_SP2, 0x0); kgsl_regwrite(device, A5XX_RBBM_CLOCK_CNTL_SP3, 0x0); kgsl_regwrite(device, A5XX_RBBM_CLOCK_CNTL2_SP0, 0x0); kgsl_regwrite(device, A5XX_RBBM_CLOCK_CNTL2_SP1, 0x0); kgsl_regwrite(device, A5XX_RBBM_CLOCK_CNTL2_SP2, 0x0); kgsl_regwrite(device, A5XX_RBBM_CLOCK_CNTL2_SP3, 0x0); /* disable HWCG */ kgsl_regwrite(device, A5XX_RBBM_CLOCK_CNTL, 0x0); kgsl_regwrite(device, A5XX_RBBM_ISDB_CNT, 0x0); } else KGSL_CORE_ERR( "Active count failed while turning on ISDB."); } else { /* if not in ISDB mode enable ME/PFP split notification */ kgsl_regwrite(device, A5XX_RBBM_AHB_CNTL1, 0xA6FFFFFF); /* enable HWCG */ a5xx_hwcg_init(adreno_dev); } kgsl_regwrite(device, A5XX_RBBM_AHB_CNTL2, 0x0000003F); if (adreno_is_preemption_enabled(adreno_dev)) { def_ttbr0 = kgsl_mmu_get_default_ttbr0(&device->mmu, Loading
drivers/gpu/msm/adreno_debugfs.c +39 −0 Original line number Diff line number Diff line Loading @@ -22,6 +22,41 @@ #include "kgsl_cffdump.h" #include "kgsl_sync.h" static int _isdb_set(void *data, u64 val) { struct kgsl_device *device = data; struct adreno_device *adreno_dev = ADRENO_DEVICE(device); /* Once ISDB goes enabled it stays enabled */ if (test_bit(ADRENO_DEVICE_ISDB_ENABLED, &adreno_dev->priv)) return 0; mutex_lock(&device->mutex); /* * Bring down the GPU so we can bring it back up with the correct power * and clock settings */ kgsl_pwrctrl_change_state(device, KGSL_STATE_SUSPEND); set_bit(ADRENO_DEVICE_ISDB_ENABLED, &adreno_dev->priv); kgsl_pwrctrl_change_state(device, KGSL_STATE_SLUMBER); mutex_unlock(&device->mutex); return 0; } static int _isdb_get(void *data, u64 *val) { struct kgsl_device *device = data; struct adreno_device *adreno_dev = ADRENO_DEVICE(device); *val = (u64) test_bit(ADRENO_DEVICE_ISDB_ENABLED, &adreno_dev->priv); return 0; } DEFINE_SIMPLE_ATTRIBUTE(_isdb_fops, _isdb_get, _isdb_set, "%llu\n"); static int _active_count_get(void *data, u64 *val) { struct kgsl_device *device = data; Loading Loading @@ -278,4 +313,8 @@ void adreno_debugfs_init(struct adreno_device *adreno_dev) &_active_count_fops); adreno_dev->ctx_d_debugfs = debugfs_create_dir("ctx", device->d_debugfs); if (adreno_is_a5xx(adreno_dev)) debugfs_create_file("isdb", 0644, device->d_debugfs, device, &_isdb_fops); }
drivers/gpu/msm/adreno_dispatch.c +5 −5 Original line number Diff line number Diff line Loading @@ -251,8 +251,7 @@ static void start_fault_timer(struct adreno_device *adreno_dev) { struct adreno_dispatcher *dispatcher = &adreno_dev->dispatcher; if (test_bit(ADRENO_DEVICE_SOFT_FAULT_DETECT, &adreno_dev->priv) && adreno_dev->fast_hang_detect) if (adreno_soft_fault_detect(adreno_dev)) mod_timer(&dispatcher->fault_timer, jiffies + msecs_to_jiffies(_fault_timer_interval)); } Loading Loading @@ -2027,7 +2026,8 @@ static void adreno_dispatcher_work(struct work_struct *work) /* process the active q*/ count = adreno_dispatch_process_cmdqueue(adreno_dev, &(adreno_dev->cur_rb->dispatch_q), adreno_dev->long_ib_detect); adreno_long_ib_detect(adreno_dev)); else if (ADRENO_DISPATCHER_PREEMPT_TRIGGERED == atomic_read(&dispatcher->preemption_state)) count = adreno_dispatch_process_cmdqueue(adreno_dev, Loading @@ -2045,7 +2045,7 @@ static void adreno_dispatcher_work(struct work_struct *work) /* active level switched, clear new level cmdbatches */ count = adreno_dispatch_process_cmdqueue(adreno_dev, dispatch_q, adreno_dev->long_ib_detect); adreno_long_ib_detect(adreno_dev)); /* * If GPU has already completed all the commands in new incoming * RB then we may not get another interrupt due to which Loading Loading @@ -2148,7 +2148,7 @@ static void adreno_dispatcher_fault_timer(unsigned long data) struct adreno_dispatcher *dispatcher = &adreno_dev->dispatcher; /* Leave if the user decided to turn off fast hang detection */ if (adreno_dev->fast_hang_detect == 0) if (!adreno_soft_fault_detect(adreno_dev)) return; if (adreno_gpu_fault(adreno_dev)) { Loading