Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit da740472 authored by Russell King's avatar Russell King
Browse files

ARM: entry: data abort: tail-call the main data abort handler



Tail-call the main C data abort handler code from the per-CPU helper
code.  Update the comments in the code wrt the new calling and return
register state.

Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 0d147db0
Loading
Loading
Loading
Loading
+4 −10
Original line number Diff line number Diff line
@@ -60,6 +60,7 @@
	@
	@ Call the processor-specific abort handler:
	@
	@  r2 - pt_regs
	@  r4 - aborted context pc
	@  r5 - aborted context psr
	@
@@ -186,13 +187,8 @@ ENDPROC(__und_invalid)
	.align	5
__dabt_svc:
	svc_entry
	dabt_helper

	@
	@ call main handler
	@
	mov	r2, sp
	bl	do_DataAbort
	dabt_helper

	@
	@ IRQs off again before pulling preserved data off the stack
@@ -407,11 +403,9 @@ ENDPROC(__pabt_svc)
__dabt_usr:
	usr_entry
	kuser_cmpxchg_check
	dabt_helper

	mov	r2, sp
	adr	lr, BSYM(ret_from_exception)
	b	do_DataAbort
	dabt_helper
	b	ret_from_exception
 UNWIND(.fnend		)
ENDPROC(__dabt_usr)

+4 −7
Original line number Diff line number Diff line
@@ -3,14 +3,11 @@
/*
 * Function: v4_early_abort
 *
 * Params  : r4 = aborted context pc
 * Params  : r2 = pt_regs
 *	   : r4 = aborted context pc
 *	   : r5 = aborted context psr
 *
 * Returns : r0 = address of abort
 *	   : r1 = FSR, bit 11 = write
 *	   : r2-r8 = corrupted
 *	   : r9 = preserved
 *	   : sp = pointer to registers
 * Returns : r4 - r11, r13 preserved
 *
 * Purpose : obtain information about current aborted instruction.
 * Note: we read user space.  This means we might cause a data
@@ -25,4 +22,4 @@ ENTRY(v4_early_abort)
	bic	r1, r1, #1 << 11 | 1 << 10	@ clear bits 11 and 10 of FSR
	tst	r3, #1 << 20			@ L = 1 -> write?
	orreq	r1, r1, #1 << 11		@ yes.
	mov	pc, lr
	b	do_DataAbort
+4 −7
Original line number Diff line number Diff line
@@ -4,14 +4,11 @@
/*
 * Function: v4t_early_abort
 *
 * Params  : r4 = aborted context pc
 * Params  : r2 = pt_regs
 *	   : r4 = aborted context pc
 *	   : r5 = aborted context psr
 *
 * Returns : r0 = address of abort
 *	   : r1 = FSR, bit 11 = write
 *	   : r2-r8 = corrupted
 *	   : r9 = preserved
 *	   : sp = pointer to registers
 * Returns : r4 - r11, r13 preserved
 *
 * Purpose : obtain information about current aborted instruction.
 * Note: we read user space.  This means we might cause a data
@@ -27,4 +24,4 @@ ENTRY(v4t_early_abort)
	bic	r1, r1, #1 << 11 | 1 << 10	@ clear bits 11 and 10 of FSR
	tst	r3, #1 << 20			@ check write
	orreq	r1, r1, #1 << 11
	mov	pc, lr
	b	do_DataAbort
+4 −7
Original line number Diff line number Diff line
@@ -4,14 +4,11 @@
/*
 * Function: v5t_early_abort
 *
 * Params  : r4 = aborted context pc
 * Params  : r2 = pt_regs
 *	   : r4 = aborted context pc
 *	   : r5 = aborted context psr
 *
 * Returns : r0 = address of abort
 *	   : r1 = FSR, bit 11 = write
 *	   : r2-r8 = corrupted
 *	   : r9 = preserved
 *	   : sp = pointer to registers
 * Returns : r4 - r11, r13 preserved
 *
 * Purpose : obtain information about current aborted instruction.
 * Note: we read user space.  This means we might cause a data
@@ -28,4 +25,4 @@ ENTRY(v5t_early_abort)
	do_ldrd_abort tmp=ip, insn=r3
	tst	r3, #1 << 20			@ check write
	orreq	r1, r1, #1 << 11
	mov	pc, lr
	b	do_DataAbort
+5 −8
Original line number Diff line number Diff line
@@ -4,14 +4,11 @@
/*
 * Function: v5tj_early_abort
 *
 * Params  : r4 = aborted context pc
 * Params  : r2 = pt_regs
 *	   : r4 = aborted context pc
 *	   : r5 = aborted context psr
 *
 * Returns : r0 = address of abort
 *	   : r1 = FSR, bit 11 = write
 *	   : r2-r8 = corrupted
 *	   : r9 = preserved
 *	   : sp = pointer to registers
 * Returns : r4 - r11, r13 preserved
 *
 * Purpose : obtain information about current aborted instruction.
 * Note: we read user space.  This means we might cause a data
@@ -24,10 +21,10 @@ ENTRY(v5tj_early_abort)
	mrc	p15, 0, r0, c6, c0, 0		@ get FAR
	bic	r1, r1, #1 << 11 | 1 << 10	@ clear bits 11 and 10 of FSR
	tst	r5, #PSR_J_BIT			@ Java?
	movne	pc, lr
	bne	do_DataAbort
	do_thumb_abort fsr=r1, pc=r4, psr=r5, tmp=r3
	ldreq	r3, [r4]			@ read aborted ARM instruction
	do_ldrd_abort tmp=ip, insn=r3
	tst	r3, #1 << 20			@ L = 0 -> write
	orreq	r1, r1, #1 << 11		@ yes.
	mov	pc, lr
	b	do_DataAbort
Loading