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Commit d9d51a3d authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "iommu: msm: Add support for N-depth pre-fetch"

parents 5443a795 164575ed

Documentation/devicetree/bindings/iommu/msm_iommu_v1.txt

+5 −0
Original line number Diff line number Diff line
@@ -77,6 +77,11 @@ Optional properties: 
  the Stream Mapping Table entries.

- qcom,report-error-on-fault : boolean indicating that when any fault

  occurs in this context bank, an error will be sent to respective master

- qcom,prefetch-depth: Defines a custom pre-fetch depth for the CB.

	0x0 : No additional prefetch. N = 0

	0x1 : N = 4

	0x2 : N = 8

	0x3 : N = 16



Example:

drivers/iommu/msm_iommu-v1.c

+4 −0
Original line number Diff line number Diff line
@@ -832,6 +832,10 @@ static void __program_context(struct msm_iommu_drvdata *iommu_drvdata, 
		SET_CB_ACTLR_BPRCISH(cb_base, ctx, 1);

		SET_CB_ACTLR_BPRCOSH(cb_base, ctx, 1);

		SET_CB_ACTLR_BPRCNSH(cb_base, ctx, 1);

	} else if (iommu_drvdata->model == MMU_500 &&

			ctx_drvdata->prefetch_depth) {

		SET_CB_ACTLR_PF_WINDOW(cb_base, ctx,

				ctx_drvdata->prefetch_depth);

	}



	/* Enable private ASID namespace */

drivers/iommu/msm_iommu_dev-v1.c

+4 −0
Original line number Diff line number Diff line
@@ -633,6 +633,10 @@ static int msm_iommu_ctx_parse_dt(struct platform_device *pdev, 
	}

	ctx_drvdata->n_sid_mask = n_sid_mask;



	if (!of_property_read_u32(pdev->dev.of_node, "qcom,prefetch-depth",

				&(ctx_drvdata->prefetch_depth)))

		ctx_drvdata->prefetch_depth = 0;



out:

	return ret;

}

drivers/iommu/msm_iommu_hw-v1.h

+8 −0
Original line number Diff line number Diff line
@@ -625,6 +625,8 @@ do { \ 
		SET_CONTEXT_FIELD(b, c, CB_ACTLR, BPRCISH, v)

#define SET_CB_ACTLR_BPRCNSH(b, c, v) \

		SET_CONTEXT_FIELD(b, c, CB_ACTLR, BPRCNSH, v)

#define SET_CB_ACTLR_PF_WINDOW(b, c, v) \

		SET_CONTEXT_FIELD(b, c, CB_ACTLR, PF_WINDOW, v)



#define GET_CB_ACTLR_REQPRIORITY (b, c) \

		GET_CONTEXT_FIELD(b, c, CB_ACTLR, REQPRIORITY)
@@ -634,6 +636,8 @@ do { \ 
#define GET_CB_ACTLR_BPRCOSH(b, c)  GET_CONTEXT_FIELD(b, c, CB_ACTLR, BPRCOSH)

#define GET_CB_ACTLR_BPRCISH(b, c)  GET_CONTEXT_FIELD(b, c, CB_ACTLR, BPRCISH)

#define GET_CB_ACTLR_BPRCNSH(b, c)  GET_CONTEXT_FIELD(b, c, CB_ACTLR, BPRCNSH)

#define GET_CB_ACTLR_PF_WINDOW(b, c) \

				GET_CONTEXT_FIELD(b, c, CB_ACTLR, PF_WINDOW)



/* Address Translation, Stage 1, Privileged Read: CB_ATS1PR */

#define SET_CB_ATS1PR_ADDR(b, c, v) SET_CONTEXT_FIELD(b, c, CB_ATS1PR, ADDR, v)
@@ -1354,6 +1358,8 @@ do { \ 
#define CB_ACTLR_BPRCOSH (CB_ACTLR_BPRCOSH_MASK << CB_ACTLR_BPRCOSH_SHIFT)

#define CB_ACTLR_BPRCISH (CB_ACTLR_BPRCISH_MASK << CB_ACTLR_BPRCISH_SHIFT)

#define CB_ACTLR_BPRCNSH (CB_ACTLR_BPRCNSH_MASK << CB_ACTLR_BPRCNSH_SHIFT)

#define CB_ACTLR_PF_WINDOW \

		(CB_ACTLR_PF_WINDOW_MASK << CB_ACTLR_PF_WINDOW_SHIFT)



/* Address Translation, Stage 1, Privileged Read: CB_ATS1PR */

#define CB_ATS1PR_ADDR  (CB_ATS1PR_ADDR_MASK << CB_ATS1PR_ADDR_SHIFT)
@@ -1769,6 +1775,7 @@ do { \ 
#define CB_ACTLR_BPRCOSH_MASK        0x1

#define CB_ACTLR_BPRCISH_MASK        0x1

#define CB_ACTLR_BPRCNSH_MASK        0x1

#define CB_ACTLR_PF_WINDOW_MASK      0x2



/* Address Translation, Stage 1, Privileged Read: CB_ATS1PR */

#define CB_ATS1PR_ADDR_MASK     0xFFFFF
@@ -2178,6 +2185,7 @@ do { \ 
#define CB_ACTLR_BPRCOSH_SHIFT         28

#define CB_ACTLR_BPRCISH_SHIFT         29

#define CB_ACTLR_BPRCNSH_SHIFT         30

#define CB_ACTLR_PF_WINDOW_SHIFT       8



/* Address Translation, Stage 1, Privileged Read: CB_ATS1PR */

#define CB_ATS1PR_ADDR_SHIFT       12

include/linux/qcom_iommu.h

+1 −0
Original line number Diff line number Diff line
@@ -200,6 +200,7 @@ struct msm_iommu_ctx_drvdata { 
	u32 sid_mask[MAX_NUM_SMR];

	unsigned int n_sid_mask;

	bool report_error_on_fault;

	unsigned int prefetch_depth;

};



enum dump_reg {