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Commit d9909ebe authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

ARM: spear: make clock driver independent of headers 



Device drivers should not access MMIO registers through hardcoded
platform specific address constants. Instead, we can pass the
MMIO token to the spear clock driver in the initialization routine
to contain that knowledge in the platform code itself.

Ideally, the clock driver would use of_iomap() or similar to
get the address, and that can be used later, but for now, this
is the minimal change.

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
Acked-by: default avatarViresh Kumar <viresh.kumar@linaro.org>
parent 2b9c613c

arch/arm/mach-spear/generic.h

+7 −6
Original line number Diff line number Diff line
@@ -29,10 +29,11 @@ extern struct dw_dma_slave nand_write_dma_priv; 
bool dw_dma_filter(struct dma_chan *chan, void *slave);



void __init spear_setup_of_timer(void);

void __init spear3xx_clk_init(void);

void __init spear3xx_clk_init(void __iomem *misc_base,

			      void __iomem *soc_config_base);

void __init spear3xx_map_io(void);

void __init spear3xx_dt_init_irq(void);

void __init spear6xx_clk_init(void);

void __init spear6xx_clk_init(void __iomem *misc_base);

void __init spear13xx_map_io(void);

void __init spear13xx_l2x0_init(void);
@@ -44,15 +45,15 @@ void __cpuinit spear13xx_cpu_die(unsigned int cpu); 
extern struct smp_operations spear13xx_smp_ops;



#ifdef CONFIG_MACH_SPEAR1310

void __init spear1310_clk_init(void);

void __init spear1310_clk_init(void __iomem *misc_base, void __iomem *ras_base);

#else

static inline void spear1310_clk_init(void) {}

static inline void spear1310_clk_init(void __iomem *misc_base, void __iomem *ras_base) {}

#endif



#ifdef CONFIG_MACH_SPEAR1340

void __init spear1340_clk_init(void);

void __init spear1340_clk_init(void __iomem *misc_base);

#else

static inline void spear1340_clk_init(void) {}

static inline void spear1340_clk_init(void __iomem *misc_base) {}

#endif



#endif /* __MACH_GENERIC_H */

arch/arm/mach-spear/include/mach/misc_regs.h

+1 −1
Original line number Diff line number Diff line
@@ -16,7 +16,7 @@ 


#include <mach/spear.h>



#define MISC_BASE		IOMEM(VA_SPEAR_ICM3_MISC_REG_BASE)

#define MISC_BASE		(VA_SPEAR_ICM3_MISC_REG_BASE)

#define DMA_CHN_CFG		(MISC_BASE + 0x0A0)



#endif /* __MACH_MISC_REGS_H */

arch/arm/mach-spear/include/mach/spear.h

+11 −17
Original line number Diff line number Diff line
@@ -19,23 +19,23 @@ 


/* ICM1 - Low speed connection */

#define SPEAR_ICM1_2_BASE		UL(0xD0000000)

#define VA_SPEAR_ICM1_2_BASE		UL(0xFD000000)

#define VA_SPEAR_ICM1_2_BASE		IOMEM(0xFD000000)

#define SPEAR_ICM1_UART_BASE		UL(0xD0000000)

#define VA_SPEAR_ICM1_UART_BASE		(VA_SPEAR_ICM1_2_BASE | SPEAR_ICM1_UART_BASE)

#define VA_SPEAR_ICM1_UART_BASE		(VA_SPEAR_ICM1_2_BASE - SPEAR_ICM1_2_BASE + SPEAR_ICM1_UART_BASE)

#define SPEAR3XX_ICM1_SSP_BASE		UL(0xD0100000)



/* ML-1, 2 - Multi Layer CPU Subsystem */

#define SPEAR_ICM3_ML1_2_BASE		UL(0xF0000000)

#define VA_SPEAR6XX_ML_CPU_BASE		UL(0xF0000000)

#define VA_SPEAR6XX_ML_CPU_BASE		IOMEM(0xF0000000)



/* ICM3 - Basic Subsystem */

#define SPEAR_ICM3_SMI_CTRL_BASE	UL(0xFC000000)

#define VA_SPEAR_ICM3_SMI_CTRL_BASE	UL(0xFC000000)

#define VA_SPEAR_ICM3_SMI_CTRL_BASE	IOMEM(0xFC000000)

#define SPEAR_ICM3_DMA_BASE		UL(0xFC400000)

#define SPEAR_ICM3_SYS_CTRL_BASE	UL(0xFCA00000)

#define VA_SPEAR_ICM3_SYS_CTRL_BASE	(VA_SPEAR_ICM3_SMI_CTRL_BASE | SPEAR_ICM3_SYS_CTRL_BASE)

#define VA_SPEAR_ICM3_SYS_CTRL_BASE	(VA_SPEAR_ICM3_SMI_CTRL_BASE - SPEAR_ICM3_SMI_CTRL_BASE + SPEAR_ICM3_SYS_CTRL_BASE)

#define SPEAR_ICM3_MISC_REG_BASE	UL(0xFCA80000)

#define VA_SPEAR_ICM3_MISC_REG_BASE	(VA_SPEAR_ICM3_SMI_CTRL_BASE | SPEAR_ICM3_MISC_REG_BASE)

#define VA_SPEAR_ICM3_MISC_REG_BASE	(VA_SPEAR_ICM3_SMI_CTRL_BASE - SPEAR_ICM3_SMI_CTRL_BASE + SPEAR_ICM3_MISC_REG_BASE)



/* Debug uart for linux, will be used for debug and uncompress messages */

#define SPEAR_DBG_UART_BASE		SPEAR_ICM1_UART_BASE
@@ -44,20 +44,11 @@ 
/* Sysctl base for spear platform */

#define SPEAR_SYS_CTRL_BASE		SPEAR_ICM3_SYS_CTRL_BASE

#define VA_SPEAR_SYS_CTRL_BASE		VA_SPEAR_ICM3_SYS_CTRL_BASE

#endif /* SPEAR3xx || SPEAR6XX */



/* SPEAr320 Macros */

#define SPEAR320_SOC_CONFIG_BASE	UL(0xB3000000)

#define VA_SPEAR320_SOC_CONFIG_BASE	UL(0xFE000000)

#define SPEAR320_CONTROL_REG		IOMEM(VA_SPEAR320_SOC_CONFIG_BASE)

#define SPEAR320_EXT_CTRL_REG		IOMEM(VA_SPEAR320_SOC_CONFIG_BASE + 0x0018)

	#define SPEAR320_UARTX_PCLK_MASK		0x1

	#define SPEAR320_UART2_PCLK_SHIFT		8

	#define SPEAR320_UART3_PCLK_SHIFT		9

	#define SPEAR320_UART4_PCLK_SHIFT		10

	#define SPEAR320_UART5_PCLK_SHIFT		11

	#define SPEAR320_UART6_PCLK_SHIFT		12

	#define SPEAR320_RS485_PCLK_SHIFT		13

#endif /* SPEAR3xx || SPEAR6XX */

#define VA_SPEAR320_SOC_CONFIG_BASE	IOMEM(0xFE000000)



#ifdef CONFIG_ARCH_SPEAR13XX
@@ -79,6 +70,9 @@ 
#define A9SM_AND_MPMC_BASE			UL(0xEC000000)

#define VA_A9SM_AND_MPMC_BASE			IOMEM(0xFC000000)



#define SPEAR1310_RAS_BASE			UL(0xD8400000)

#define VA_SPEAR1310_RAS_BASE			IOMEM(UL(0xFA400000))



/* A9SM peripheral offsets */

#define A9SM_PERIP_BASE				UL(0xEC800000)

#define VA_A9SM_PERIP_BASE			IOMEM(0xFC800000)

arch/arm/mach-spear/spear1310.c

+0 −2
Original line number Diff line number Diff line
@@ -30,8 +30,6 @@ 


#define SPEAR1310_RAS_GRP1_BASE			UL(0xD8000000)

#define VA_SPEAR1310_RAS_GRP1_BASE		UL(0xFA000000)

#define SPEAR1310_RAS_BASE			UL(0xD8400000)

#define VA_SPEAR1310_RAS_BASE			IOMEM(UL(0xFA400000))



static struct arasan_cf_pdata cf_pdata = {

	.cf_if_clk = CF_IF_CLK_166M,

arch/arm/mach-spear/spear13xx.c

+2 −2
Original line number Diff line number Diff line
@@ -146,9 +146,9 @@ void __init spear13xx_map_io(void) 
static void __init spear13xx_clk_init(void)

{

	if (of_machine_is_compatible("st,spear1310"))

		spear1310_clk_init();

		spear1310_clk_init(VA_MISC_BASE, VA_SPEAR1310_RAS_BASE);

	else if (of_machine_is_compatible("st,spear1340"))

		spear1340_clk_init();

		spear1340_clk_init(VA_MISC_BASE);

	else

		pr_err("%s: Unknown machine\n", __func__);

}