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Commit d964fc54 authored by Matt Turner's avatar Matt Turner Committed by Dave Airlie
Browse files

drm/radeon: use ALIGN instead of open coding it 



Cc: Jerome Glisse <jglisse@redhat.com>
Cc: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: default avatarMatt Turner <mattst88@gmail.com>
Reviewed-by: default avatarCorbin Simpson <MostAwesomeDude@gmail.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent 32b3c2ab

drivers/gpu/drm/radeon/r600_blit.c

+1 −1
Original line number Diff line number Diff line
@@ -49,7 +49,7 @@ set_render_target(drm_radeon_private_t *dev_priv, int format, int w, int h, u64 
	RING_LOCALS;

	DRM_DEBUG("\n");



	h = (h + 7) & ~7;

	h = ALIGN(h, 8);

	if (h < 8)

		h = 8;

drivers/gpu/drm/radeon/r600_blit_kms.c

+2 −2
Original line number Diff line number Diff line
@@ -25,7 +25,7 @@ set_render_target(struct radeon_device *rdev, int format, 
	u32 cb_color_info;

	int pitch, slice;



	h = (h + 7) & ~7;

	h = ALIGN(h, 8);

	if (h < 8)

		h = 8;
@@ -396,7 +396,7 @@ set_default_state(struct radeon_device *rdev) 
				    NUM_ES_STACK_ENTRIES(num_es_stack_entries));



	/* emit an IB pointing at default state */

	dwords = (rdev->r600_blit.state_len + 0xf) & ~0xf;

	dwords = ALIGN(rdev->r600_blit.state_len, 0x10);

	gpu_addr = rdev->r600_blit.shader_gpu_addr + rdev->r600_blit.state_offset;

	radeon_ring_write(rdev, PACKET3(PACKET3_INDIRECT_BUFFER, 2));

	radeon_ring_write(rdev, gpu_addr & 0xFFFFFFFC);