Commit d9524dc3 authored Aug 21, 2012 by Will Deacon

ARM: cacheflush: don't round address range up to nearest page



The flush_cache_user_range macro takes a pair of addresses describing
the start and end of the virtual address range to flush. Due to an
accidental oversight when flush_cache_range_user was introduced, the
address range was rounded up so that the start and end addresses were
page-aligned.

For historical reference, the interesting commits in history.git are:

10eacf1775e1 ("[ARM] Clean up ARM cache handling interfaces (part 1)")
71432e79b76b ("[ARM] Add flush_cache_user_page() for sys_cacheflush()")

This patch removes the alignment code, reducing the amount of flushing
required for ranges that are not an exact multiple of PAGE_SIZE.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Reported-by: Jonathan Austin <jonathan.austin@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>

parent 28256d61

arch/arm/include/asm/cacheflush.h

+1 −2

Original line number	Diff line number	Diff line
		@@ -268,8 +268,7 @@ extern void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr
		* Harvard caches are synchronised for the user space address range.
		* This is used for the ARM private sys_cacheflush system call.
		*/
		#define flush_cache_user_range(start,end) \
		__cpuc_coherent_user_range((start) & PAGE_MASK, PAGE_ALIGN(end))
		#define flush_cache_user_range(s,e) __cpuc_coherent_user_range(s,e)

		/*
		* Perform necessary cache operations to ensure that data previously