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Commit d8c4cd74 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge branch 'fixes-for-arm-soc' of... 

Merge branch 'fixes-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into fixes

* 'fixes-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
  mach-ux500: no MMC_CAP_SD_HIGHSPEED on Snowball
  mach-ux500: enable ARM errata 764369
  mach-ux500: do not override outer.inv_all
  mach-ux500: musb: now musb is always in OTG mode
parents 3c8cee3b 2ab1159e

arch/arm/mach-ux500/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ config UX500_SOC_COMMON 
	select HAS_MTU

	select ARM_ERRATA_753970

	select ARM_ERRATA_754322

	select ARM_ERRATA_764369



menu "Ux500 SoC"

arch/arm/mach-ux500/board-mop500-sdi.c

+2 −0
Original line number Diff line number Diff line
@@ -261,6 +261,8 @@ void __init mop500_sdi_init(void) 


void __init snowball_sdi_init(void)

{

	/* On Snowball MMC_CAP_SD_HIGHSPEED isn't supported (Hardware issue?) */

	mop500_sdi0_data.capabilities &= ~MMC_CAP_SD_HIGHSPEED;

	/* On-board eMMC */

	db8500_add_sdi4(&mop500_sdi4_data, U8500_SDI_V2_PERIPHID);

	/* External Micro SD slot */

arch/arm/mach-ux500/cache-l2x0.c

+7 −41
Original line number Diff line number Diff line
@@ -12,44 +12,6 @@ 


static void __iomem *l2x0_base;



static inline void ux500_cache_wait(void __iomem *reg, unsigned long mask)

{

	/* wait for the operation to complete */

	while (readl_relaxed(reg) & mask)

		cpu_relax();

}



static inline void ux500_cache_sync(void)

{

	writel_relaxed(0, l2x0_base + L2X0_CACHE_SYNC);

	ux500_cache_wait(l2x0_base + L2X0_CACHE_SYNC, 1);

}



/*

 * The L2 cache cannot be turned off in the non-secure world.

 * Dummy until a secure service is in place.

 */

static void ux500_l2x0_disable(void)

{

}



/*

 * This is only called when doing a kexec, just after turning off the L2

 * and L1 cache, and it is surrounded by a spinlock in the generic version.

 * However, we're not really turning off the L2 cache right now and the

 * PL310 does not support exclusive accesses (used to implement the spinlock).

 * So, the invalidation needs to be done without the spinlock.

 */

static void ux500_l2x0_inv_all(void)

{

	uint32_t l2x0_way_mask = (1<<16) - 1;	/* Bitmask of active ways */



	/* invalidate all ways */

	writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_INV_WAY);

	ux500_cache_wait(l2x0_base + L2X0_INV_WAY, l2x0_way_mask);

	ux500_cache_sync();

}



static int __init ux500_l2x0_unlock(void)

{

	int i;
@@ -85,9 +47,13 @@ static int __init ux500_l2x0_init(void) 
	/* 64KB way size, 8 way associativity, force WA */

	l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff);



	/* Override invalidate function */

	outer_cache.disable = ux500_l2x0_disable;

	outer_cache.inv_all = ux500_l2x0_inv_all;

	/*

	 * We can't disable l2 as we are in non secure mode, currently

	 * this seems be called only during kexec path. So let's

	 * override outer.disable with nasty assignment until we have

	 * some SMI service available.

	 */

	outer_cache.disable = NULL;



	return 0;

}

arch/arm/mach-ux500/usb.c

+0 −6
Original line number Diff line number Diff line
@@ -95,13 +95,7 @@ static struct musb_hdrc_config musb_hdrc_config = { 
};



static struct musb_hdrc_platform_data musb_platform_data = {

#if defined(CONFIG_USB_MUSB_OTG)

	.mode = MUSB_OTG,

#elif defined(CONFIG_USB_MUSB_PERIPHERAL)

	.mode = MUSB_PERIPHERAL,

#else /* defined(CONFIG_USB_MUSB_HOST) */

	.mode = MUSB_HOST,

#endif

	.config = &musb_hdrc_config,

	.board_data = &musb_board_data,

};