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Commit d8bafc87 authored by Thomas Abraham's avatar Thomas Abraham Committed by Kukjin Kim
Browse files

ARM: dts: add Exynos4 and Exynos5 clock controller nodes 



Add clock controller nodes for EXYNOS4210, EXYNOS4x12, EXYNOS5250
and EXYNOS5440 SoCs.

Signed-off-by: default avatarThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent ca9048ec

arch/arm/boot/dts/exynos4210.dtsi

+6 −0
Original line number Diff line number Diff line
@@ -69,6 +69,12 @@ 
		};

	};



	clock: clock-controller@0x10030000 {

		compatible = "samsung,exynos4210-clock";

		reg = <0x10030000 0x20000>;

		#clock-cells = <1>;

	};



	pinctrl_0: pinctrl@11400000 {

		compatible = "samsung,exynos4210-pinctrl";

		reg = <0x11400000 0x1000>;

arch/arm/boot/dts/exynos4x12.dtsi

+6 −0
Original line number Diff line number Diff line
@@ -36,6 +36,12 @@ 
			     <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>;

	};



	clock: clock-controller@0x10030000 {

		compatible = "samsung,exynos4412-clock";

		reg = <0x10030000 0x20000>;

		#clock-cells = <1>;

	};



	pinctrl_0: pinctrl@11400000 {

		compatible = "samsung,exynos4x12-pinctrl";

		reg = <0x11400000 0x1000>;

arch/arm/boot/dts/exynos5250.dtsi

+6 −0
Original line number Diff line number Diff line
@@ -56,6 +56,12 @@ 
		reg = <0x10044040 0x20>;

	};



	clock: clock-controller@0x10010000 {

		compatible = "samsung,exynos5250-clock";

		reg = <0x10010000 0x30000>;

		#clock-cells = <1>;

	};



	gic:interrupt-controller@10481000 {

		compatible = "arm,cortex-a9-gic";

		#interrupt-cells = <3>;

arch/arm/boot/dts/exynos5440.dtsi

+6 −0
Original line number Diff line number Diff line
@@ -16,6 +16,12 @@ 


	interrupt-parent = <&gic>;



	clock: clock-controller@0x160000 {

		compatible = "samsung,exynos5440-clock";

		reg = <0x160000 0x1000>;

		#clock-cells = <1>;

	};



	gic:interrupt-controller@2E0000 {

		compatible = "arm,cortex-a15-gic";

		#interrupt-cells = <3>;