Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit d86097e1 authored by Michael Grzeschik's avatar Michael Grzeschik Committed by Mauro Carvalho Chehab
Browse files

V4L/DVB: mx2_camera: add rising edge for pixclock

parent cd9ebdbc
Loading
Loading
Loading
Loading
+2 −0
Original line number Diff line number Diff line
@@ -785,6 +785,8 @@ static int mx2_camera_set_bus_param(struct soc_camera_device *icd,
	if (ret < 0)
		return ret;

	if (common_flags & SOCAM_PCLK_SAMPLE_RISING)
		csicr1 |= CSICR1_REDGE;
	if (common_flags & SOCAM_PCLK_SAMPLE_FALLING)
		csicr1 |= CSICR1_INV_PCLK;
	if (common_flags & SOCAM_VSYNC_ACTIVE_HIGH)