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Commit d7a2415f authored by Andrew Victor's avatar Andrew Victor Committed by Russell King
Browse files

[ARM] 4904/1: [AT91] Pass ECC controller to NAND driver 



On AT91 processors that include an ECC controller, pass its base
address to the NAND driver via platform_device resources.

Signed-off-by: default avatarAndrew Victor <linux@maxim.org.za>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 3ef2fb42

arch/arm/mach-at91/at91cap9_devices.c

+6 −1
Original line number Diff line number Diff line
@@ -283,10 +283,15 @@ static struct at91_nand_data nand_data; 
#define NAND_BASE	AT91_CHIPSELECT_3



static struct resource nand_resources[] = {

	{

	[0] = {

		.start	= NAND_BASE,

		.end	= NAND_BASE + SZ_256M - 1,

		.flags	= IORESOURCE_MEM,

	},

	[1] = {

		.start	= AT91_BASE_SYS + AT91_ECC,

		.end	= AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,

		.flags	= IORESOURCE_MEM,

	}

};

arch/arm/mach-at91/at91sam9260_devices.c

+6 −1
Original line number Diff line number Diff line
@@ -288,10 +288,15 @@ static struct at91_nand_data nand_data; 
#define NAND_BASE	AT91_CHIPSELECT_3



static struct resource nand_resources[] = {

	{

	[0] = {

		.start	= NAND_BASE,

		.end	= NAND_BASE + SZ_256M - 1,

		.flags	= IORESOURCE_MEM,

	},

	[1] = {

		.start	= AT91_BASE_SYS + AT91_ECC,

		.end	= AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,

		.flags	= IORESOURCE_MEM,

	}

};

arch/arm/mach-at91/at91sam9263_devices.c

+6 −1
Original line number Diff line number Diff line
@@ -358,10 +358,15 @@ static struct at91_nand_data nand_data; 
#define NAND_BASE	AT91_CHIPSELECT_3



static struct resource nand_resources[] = {

	{

	[0] = {

		.start	= NAND_BASE,

		.end	= NAND_BASE + SZ_256M - 1,

		.flags	= IORESOURCE_MEM,

	},

	[1] = {

		.start	= AT91_BASE_SYS + AT91_ECC0,

		.end	= AT91_BASE_SYS + AT91_ECC0 + SZ_512 - 1,

		.flags	= IORESOURCE_MEM,

	}

};

arch/arm/mach-at91/at91sam9rl_devices.c

+6 −1
Original line number Diff line number Diff line
@@ -105,10 +105,15 @@ static struct at91_nand_data nand_data; 
#define NAND_BASE	AT91_CHIPSELECT_3



static struct resource nand_resources[] = {

	{

	[0] = {

		.start	= NAND_BASE,

		.end	= NAND_BASE + SZ_256M - 1,

		.flags	= IORESOURCE_MEM,

	},

	[1] = {

		.start	= AT91_BASE_SYS + AT91_ECC,

		.end	= AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,

		.flags	= IORESOURCE_MEM,

	}

};

include/asm-arm/arch-at91/at91_ecc.h

+5 −5
Original line number Diff line number Diff line
@@ -13,26 +13,26 @@ 
#ifndef AT91_ECC_H

#define AT91_ECC_H



#define AT91_ECC_CR		(AT91_ECC + 0x00)	/* Control register */

#define AT91_ECC_CR		0x00			/* Control register */

#define		AT91_ECC_RST		(1 << 0)		/* Reset parity */



#define AT91_ECC_MR		(AT91_ECC + 0x04)	/* Mode register */

#define AT91_ECC_MR		0x04			/* Mode register */

#define		AT91_ECC_PAGESIZE	(3 << 0)		/* Page Size */

#define			AT91_ECC_PAGESIZE_528		(0)

#define			AT91_ECC_PAGESIZE_1056		(1)

#define			AT91_ECC_PAGESIZE_2112		(2)

#define			AT91_ECC_PAGESIZE_4224		(3)



#define AT91_ECC_SR		(AT91_ECC + 0x08)	/* Status register */

#define AT91_ECC_SR		0x08			/* Status register */

#define		AT91_ECC_RECERR		(1 << 0)		/* Recoverable Error */

#define		AT91_ECC_ECCERR		(1 << 1)		/* ECC Single Bit Error */

#define		AT91_ECC_MULERR		(1 << 2)		/* Multiple Errors */



#define AT91_ECC_PR		(AT91_ECC + 0x0c)	/* Parity register */

#define AT91_ECC_PR		0x0c			/* Parity register */

#define		AT91_ECC_BITADDR	(0xf << 0)		/* Bit Error Address */

#define		AT91_ECC_WORDADDR	(0xfff << 4)		/* Word Error Address */



#define AT91_ECC_NPR		(AT91_ECC + 0x10)	/* NParity register */

#define AT91_ECC_NPR		0x10			/* NParity register */

#define		AT91_ECC_NPARITY	(0xffff << 0)		/* NParity */



#endif