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Commit d7731c0f authored by Stephane Eranian's avatar Stephane Eranian Committed by Andi Kleen
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[PATCH] i386: i386 rename X86_FEATURE_DTES to X86_FEATURE_DS 



Here is a patch (used by perfmon2) that renames X86_FEATURE_DTES to
X86_FEATURE_DS to match Intel's documentation for the Debug Store save area on
i386.  The patch also adds cpu_has_ds.

- rename X86_FEATURE_DTES to X86_FEATURE_DS to match documentation

- adds cpu_has_ds to test for X86_FEATURE_DS

Signed-off-by: default avatarstephane eranian <eranian@hpl.hp.com>
Signed-off-by: default avatarAndi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
parent d8cebe65

include/asm-i386/cpufeature.h

+2 −1
Original line number Diff line number Diff line
@@ -31,7 +31,7 @@ 
#define X86_FEATURE_PSE36	(0*32+17) /* 36-bit PSEs */

#define X86_FEATURE_PN		(0*32+18) /* Processor serial number */

#define X86_FEATURE_CLFLSH	(0*32+19) /* Supports the CLFLUSH instruction */

#define X86_FEATURE_DTES	(0*32+21) /* Debug Trace Store */

#define X86_FEATURE_DS		(0*32+21) /* Debug Store */

#define X86_FEATURE_ACPI	(0*32+22) /* ACPI via MSR */

#define X86_FEATURE_MMX		(0*32+23) /* Multimedia Extensions */

#define X86_FEATURE_FXSR	(0*32+24) /* FXSAVE and FXRSTOR instructions (fast save and restore */
@@ -134,6 +134,7 @@ 
#define cpu_has_phe_enabled	boot_cpu_has(X86_FEATURE_PHE_EN)

#define cpu_has_pmm		boot_cpu_has(X86_FEATURE_PMM)

#define cpu_has_pmm_enabled	boot_cpu_has(X86_FEATURE_PMM_EN)

#define cpu_has_ds		boot_cpu_has(X86_FEATURE_DS)



#endif /* __ASM_I386_CPUFEATURE_H */