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Commit d74a2a0a authored by Mitchel Humpherys's avatar Mitchel Humpherys Committed by Matt Wagantall
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iommu/arm-smmu: enable clocks in tlb invalidation routines 



Previously we were relying on the callers of the tlb invalidation
functions to enable clocks.  However, the new io-pgtable framework
doesn't know anything about clocks and calls directly into the tlb
invalidation functions, so we need to put the clocks enable/disable
inside the tlb functions themselves.

Change-Id: I73a55e3f78deb3501df5615e22cd298fba6e4551
Signed-off-by: default avatarMitchel Humpherys <mitchelh@codeaurora.org>
parent 9725ec12

drivers/iommu/arm-smmu.c

+7 −0
Original line number Diff line number Diff line
@@ -761,6 +761,8 @@ static void arm_smmu_tlb_inv_context(void *cookie) 
	bool stage1 = cfg->cbar != CBAR_TYPE_S2_TRANS;

	void __iomem *base;



	arm_smmu_enable_clocks(smmu);



	if (stage1) {

		base = ARM_SMMU_CB_BASE(smmu) + ARM_SMMU_CB(smmu, cfg->cbndx);

		writel_relaxed(ARM_SMMU_CB_ASID(cfg),
@@ -772,6 +774,7 @@ static void arm_smmu_tlb_inv_context(void *cookie) 
	}



	__arm_smmu_tlb_sync(smmu);

	arm_smmu_disable_clocks(smmu);

}



static void arm_smmu_tlb_inv_range_nosync(unsigned long iova, size_t size,
@@ -783,6 +786,8 @@ static void arm_smmu_tlb_inv_range_nosync(unsigned long iova, size_t size, 
	bool stage1 = cfg->cbar != CBAR_TYPE_S2_TRANS;

	void __iomem *reg;



	arm_smmu_enable_clocks(smmu);



	if (stage1) {

		reg = ARM_SMMU_CB_BASE(smmu) + ARM_SMMU_CB(smmu, cfg->cbndx);

		reg += leaf ? ARM_SMMU_CB_S1_TLBIVAL : ARM_SMMU_CB_S1_TLBIVA;
@@ -809,6 +814,8 @@ static void arm_smmu_tlb_inv_range_nosync(unsigned long iova, size_t size, 
		reg = ARM_SMMU_GR0(smmu) + ARM_SMMU_GR0_TLBIVMID;

		writel_relaxed(ARM_SMMU_CB_VMID(cfg), reg);

	}



	arm_smmu_disable_clocks(smmu);

}



static void arm_smmu_flush_pgtable(void *addr, size_t size, void *cookie)