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Commit d6957931 authored by Ajay Agarwal's avatar Ajay Agarwal Committed by Gerrit - the friendly Code Review server
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dwc3: Preserve TxFIFO of IN/INT EP for UDC without tx-fifo-resize



We are clearing existing allocated TxFIFO during set_config
even if a controller does not have tx-fifo-resize flag set
in the DT. Also we do not resize the FIFOs for such controller.
As a result, the FIFO depths for the IN/INT EPs (excpet 0 IN)
of the controller are 0 and it cannot work in device mode.

Fix this issue by not clearing the default TxFIFO if
tx-fifo-resize flag is not set.

Change-Id: I5cf7d2eb017b8ed55348e578c10856d62a3e282e
Signed-off-by: default avatarAjay Agarwal <ajaya@codeaurora.org>
parent 4565d126
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+23 −15
Original line number Original line Diff line number Diff line
@@ -598,23 +598,31 @@ static int dwc3_ep0_set_config(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
		break;
		break;


	case USB_STATE_ADDRESS:
	case USB_STATE_ADDRESS:
		/*
		 * If tx-fifo-resize flag is not set for the controller, then
		 * do not clear existing allocated TXFIFO since we do not
		 * allocate it again in dwc3_gadget_resize_tx_fifos
		 */
		if (dwc->needs_fifo_resize) {
			/* Read ep0IN related TXFIFO size */
			/* Read ep0IN related TXFIFO size */
			dwc->last_fifo_depth = (dwc3_readl(dwc->regs,
			dwc->last_fifo_depth = (dwc3_readl(dwc->regs,
						DWC3_GTXFIFOSIZ(0)) & 0xFFFF);
						DWC3_GTXFIFOSIZ(0)) & 0xFFFF);
		/* Clear existing allocated TXFIFO for all IN eps except ep0 */
			/* Clear existing TXFIFO for all IN eps except ep0 */
			for (num = 0; num < dwc->num_in_eps; num++) {
			for (num = 0; num < dwc->num_in_eps; num++) {
				dep = dwc->eps[(num << 1) | 1];
				dep = dwc->eps[(num << 1) | 1];
				if (num) {
				if (num) {
				dwc3_writel(dwc->regs, DWC3_GTXFIFOSIZ(num), 0);
					dwc3_writel(dwc->regs,
						DWC3_GTXFIFOSIZ(num), 0);
					dep->fifo_depth = 0;
					dep->fifo_depth = 0;
				} else {
				} else {
					dep->fifo_depth = dwc->last_fifo_depth;
					dep->fifo_depth = dwc->last_fifo_depth;
				}
				}


			dev_dbg(dwc->dev, "%s(): %s dep->fifo_depth:%x\n",
				dev_dbg(dwc->dev, "%s(): %s fifo_depth:%x\n",
					__func__, dep->name, dep->fifo_depth);
					__func__, dep->name, dep->fifo_depth);
				dbg_event(0xFF, "fifo_reset", dep->number);
				dbg_event(0xFF, "fifo_reset", dep->number);
			}
			}
		}


		ret = dwc3_ep0_delegate_req(dwc, ctrl);
		ret = dwc3_ep0_delegate_req(dwc, ctrl);
		/* if the cfg matches and the cfg is non zero */
		/* if the cfg matches and the cfg is non zero */