drm/i915: prevent FIFO calculation overflows on 32 bits with high dotclocks (d660467c) · Commits · e / devices / android_kernel_xiaomi_markw

A very high dotclock (e.g. 229500kHz as reported by Anton) can cause the entries_required variable to overflow, potentially leading to a FIFO watermark value that's too low to support the given mode. Split the division across the calculation to avoid this. Cc: stable@kernel.org Reported-by:

Anton Khirnov <wyskas@gmail.com> Tested-by:

Anton Khirnov <wyskas@gmail.com> Signed-off-by:

Jesse Barnes <jbarnes@virtuousgeek.org>

drivers/gpu/drm/i915/intel_display.c

+8 −1

Original line number	Diff line number	Diff line
		@@ -2119,7 +2119,14 @@ static unsigned long intel_calculate_wm(unsigned long clock_in_khz,
		{
		long entries_required, wm_size;

		entries_required = (clock_in_khz * pixel_size * latency_ns) / 1000000;
		/*
		* Note: we need to make sure we don't overflow for various clock &
		* latency values.
		* clocks go from a few thousand to several hundred thousand.
		* latency is usually a few thousand
		*/
		entries_required = ((clock_in_khz / 1000) * pixel_size * latency_ns) /
		1000;
		entries_required /= wm->cacheline_size;

		DRM_DEBUG("FIFO entries required for mode: %d\n", entries_required);