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Commit d5f5192e authored by Vijayavardhan Vennapusa's avatar Vijayavardhan Vennapusa
Browse files

ARM: dts: msm: Update required properites for USB node for msmtitanium 



Update QMP PHY initialization sequence and PHY reg offsets to be used
for configuring SMP PHY for Superspeed mode working properly. Also
update missing properties like ssphy IRQ, address of TCSR register to
be read for clock selection scheme.

Change-Id: I4915839028031d07836742be617842449a991d90
Signed-off-by: default avatarVijayavardhan Vennapusa <vvreddy@codeaurora.org>
parent 7427cd00

arch/arm/boot/dts/qcom/msmtitanium.dtsi

+94 −10
Original line number Diff line number Diff line
@@ -1122,15 +1122,15 @@ 
	usb3: ssusb@7000000{

		compatible = "qcom,dwc-usb3-msm";

		reg = <0x07000000 0xfc000>,

		      <0x7E000 0x400>;

		      <0x7e000 0x400>;

		reg-names = "core_base",

			"ahb2phy_base";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;



		interrupts = <0 136 0>, <0 134 0>;

		interrupt-names = "hs_phy_irq", "pwr_event_irq";

		interrupts = <0 136 0>, <0 220 0>, <0 134 0>;

		interrupt-names = "hs_phy_irq", "ss_phy_irq", "pwr_event_irq";



		USB3_GDSC-supply = <&gdsc_usb30>;

		vbus_dwc3-supply = <&smbcharger_charger_otg>;
@@ -1236,9 +1236,13 @@ 
	qusb_phy: qusb@79000 {

		compatible = "qcom,qusb2phy";

		reg = <0x079000 0x180>,

			<0x070f8800 0x400>;

			<0x070f8800 0x400>,

			<0x01841030 0x4>,

			<0x0193f044 0x4>;

		reg-names = "qusb_phy_base",

			"qscratch_base";

			"qscratch_base",

			"ref_clk_addr",

			"tcsr_phy_clk_scheme_sel";



		vdd-supply = <&pmtitanium_s7_level>;

		vdda18-supply = <&pmtitanium_l7>;
@@ -1255,7 +1259,6 @@ 
					0x79 0x0C

					0x21 0x10

					0x14 0x9C

					0x80 0x04

					0x9F 0x1C

					0x00 0x18>;

		phy_type= "utmi";
@@ -1271,11 +1274,92 @@ 
	};



	ssphy: ssphy@78000 {

		compatible = "qcom,usb-ssphy-qmp-v2";

		reg = <0x78000 0x45C>,

		      <0x0193F244 0x4>;

		compatible = "qcom,usb-ssphy-qmp";

		reg = <0x78000 0x45c>,

		      <0x0193f244 0x4>,

		      <0x0193f044 0x4>;

		reg-names = "qmp_phy_base",

			    "vls_clamp_reg";

			    "vls_clamp_reg",

			    "tcsr_phy_clk_scheme_sel";

		qcom,qmp-phy-init-seq = <0xac 0x14 0x1a 0x00

					0x34 0x08 0x08 0x00

					0x174 0x30 0x30 0x00

					0x3c 0x06 0x06 0x00

					0xb4 0x00 0x00 0x00

					0xb8 0x08 0x08 0x00

					0x194 0x06 0x06 0x3e8

					0x19c 0x01 0x01 0x00

					0x178 0x00 0x00 0x00

					0xd0 0x82 0x82 0x00

					0xdc 0x55 0x55 0x00

					0xe0 0x55 0x55 0x00

					0xe4 0x03 0x03 0x00

					0x78 0x0b 0x0b 0x00

					0x84 0x16 0x16 0x00

					0x90 0x28 0x28 0x00

					0x108 0x80 0x80 0x00

					0x10c 0x00 0x00 0x00

					0x184 0x0a 0x0a 0x00

					0x4c 0x15 0x15 0x00

					0x50 0x34 0x34 0x00

					0x54 0x00 0x00 0x00

					0xc8 0x00 0x00 0x00

					0x18c 0x00 0x00 0x00

					0xcc 0x00 0x00 0x00

					0x128 0x00 0x00 0x00

					0x0c 0x0a 0x0a 0x00

					0x10 0x01 0x01 0x00

					0x1c 0x31 0x31 0x00

					0x20 0x01 0x01 0x00

					0x14 0x00 0x00 0x00

					0x18 0x00 0x00 0x00

					0x24 0xde 0xde 0x00

					0x28 0x07 0x07 0x00

					0x48 0x0f 0x0f 0x00

					0x70 0x0f 0x0f 0x00

					0x100 0x80 0x80 0x00

					0x440 0x0b 0x0b 0x00

					0x4d8 0x02 0x02 0x00

					0x4dc 0x6c 0x6c 0x00

					0x4e0 0xbb 0xbb 0x00

					0x508 0x77 0x77 0x00

					0x50c 0x80 0x80 0x00

					0x514 0x03 0x03 0x00

					0x51c 0x16 0x16 0x00

					0x448 0x75 0x75 0x00

					0x454 0x00 0x00 0x00

					0x40c 0x0a 0x0a 0x00

					0x41c 0x06 0x06 0x00

					0x510 0x00 0x00 0x00

					0x268 0x45 0x45 0x00

					0x2ac 0x12 0x12 0x00

					0x294 0x06 0x06 0x00

					0x254 0x00 0x00 0x00

					0x8c8 0x83 0x83 0x00

					0x8c4 0x02 0x02 0x00

					0x8cc 0x09 0x09 0x00

					0x8d0 0xa2 0xa2 0x00

					0x8d4 0x85 0x85 0x00

					0x880 0xd1 0xd1 0x00

					0x884 0x1f 0x1f 0x00

					0x888 0x47 0x47 0x00

					0x80c 0x9f 0x9f 0x00

					0x824 0x17 0x17 0x00

					0x828 0x0f 0x0f 0x00

					0x8b8 0x75 0x75 0x00

					0x8bc 0x13 0x13 0x00

					0x8b0 0x86 0x86 0x00

					0x8a0 0x04 0x04 0x00

					0x88c 0x44 0x44 0x00

					0x870 0xe7 0xe7 0x00

					0x874 0x03 0x03 0x00

					0x878 0x40 0x40 0x00

					0x87c 0x00 0x00 0x00

					0x9d8 0x88 0x88 0x00

					0xffffffff 0xffffffff 0x00 0x00>;

		qcom,qmp-phy-reg-offset = <0x988 0x98c 0x990 0x994

					0x974 0x8d8 0x8dc 0x804 0x800

					0x808>;

		vdd-supply = <&pmtitanium_l3>;

		vdda18-supply = <&pmtitanium_l7>;

		qcom,vdd-voltage-level = <0 925000 925000>;