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Commit d5f479c1 authored by Jordan Crouse's avatar Jordan Crouse
Browse files

msm: kgsl: Add and use KGSL_DEVICE macro 



Add a helper macro to convert an adreno_device pointer to a
struct kgsl_device pointer.  This is mostly syntatic sugar
but it makes the code a bit cleaner and it abstracts a bit of
the ugliness away.

Change-Id: Ic0dedbadd97bda3316a58514a5a64757bd4154c7
Signed-off-by: default avatarJordan Crouse <jcrouse@codeaurora.org>
parent 4589f677

drivers/gpu/msm/adreno.c

+52 −56
Original line number Diff line number Diff line 
/* Copyright (c) 2002,2007-2015, The Linux Foundation. All rights reserved.

/* Copyright (c) 2002,2007-2016, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -57,7 +57,7 @@ MODULE_PARM_DESC(nopreempt, "Disable GPU preemption"); 
#define KGSL_LOG_LEVEL_DEFAULT 3



static void adreno_input_work(struct work_struct *work);

static unsigned int counter_delta(struct adreno_device *adreno_dev,

static unsigned int counter_delta(struct kgsl_device *device,

	unsigned int reg, unsigned int *counter);



static struct devfreq_msm_adreno_tz_data adreno_tz_data = {
@@ -138,7 +138,7 @@ void adreno_readreg64(struct adreno_device *adreno_dev, 
{

	struct adreno_gpudev *gpudev = ADRENO_GPU_DEVICE(adreno_dev);

	unsigned int val_lo = 0, val_hi = 0;

	struct kgsl_device *device = &adreno_dev->dev;

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);



	if (adreno_checkreg_off(adreno_dev, lo))

		kgsl_regread(device, gpudev->reg_offsets->offsets[lo], &val_lo);
@@ -160,14 +160,13 @@ void adreno_writereg64(struct adreno_device *adreno_dev, 
		enum adreno_regs lo, enum adreno_regs hi, uint64_t val)

{

	struct adreno_gpudev *gpudev = ADRENO_GPU_DEVICE(adreno_dev);

	struct kgsl_device *device = &adreno_dev->dev;



	if (adreno_checkreg_off(adreno_dev, lo))

		kgsl_regwrite(device, gpudev->reg_offsets->offsets[lo],

				lower_32_bits(val));

		kgsl_regwrite(KGSL_DEVICE(adreno_dev),

			gpudev->reg_offsets->offsets[lo], lower_32_bits(val));

	if (adreno_checkreg_off(adreno_dev, hi))

		kgsl_regwrite(device, gpudev->reg_offsets->offsets[hi],

				upper_32_bits(val));

		kgsl_regwrite(KGSL_DEVICE(adreno_dev),

			gpudev->reg_offsets->offsets[hi], upper_32_bits(val));

}



/**
@@ -190,7 +189,7 @@ static size_t efuse_len; 


int adreno_efuse_map(struct adreno_device *adreno_dev)

{

	struct kgsl_device *device = &adreno_dev->dev;

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	struct resource *res;



	if (efuse_base != NULL)
@@ -420,12 +419,10 @@ static int _get_counter(struct adreno_device *adreno_dev, 
			lo, hi, PERFCOUNTER_FLAG_KERNEL);



		if (ret) {

			struct kgsl_device *device = &adreno_dev->dev;



			KGSL_DRV_ERR(device,

			KGSL_DRV_ERR(KGSL_DEVICE(adreno_dev),

				"Unable to allocate fault detect performance counter %d/%d\n",

				group, countable);

			KGSL_DRV_ERR(device,

			KGSL_DRV_ERR(KGSL_DEVICE(adreno_dev),

				"GPU fault detect will be less reliable\n");

		}

	}
@@ -514,7 +511,7 @@ static void adreno_input_work(struct work_struct *work) 
{

	struct adreno_device *adreno_dev = container_of(work,

			struct adreno_device, input_work);

	struct kgsl_device *device = &adreno_dev->dev;

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);



	mutex_lock(&device->mutex);
@@ -708,14 +705,12 @@ void adreno_irqctrl(struct adreno_device *adreno_dev, int state) 
 */

void adreno_hang_int_callback(struct adreno_device *adreno_dev, int bit)

{

	struct kgsl_device *device = &adreno_dev->dev;



	KGSL_DRV_CRIT(device, "MISC: GPU hang detected\n");

	KGSL_DRV_CRIT(KGSL_DEVICE(adreno_dev), "MISC: GPU hang detected\n");

	adreno_irqctrl(adreno_dev, 0);



	/* Trigger a fault in the dispatcher - this will effect a restart */

	adreno_set_gpu_fault(ADRENO_DEVICE(device), ADRENO_HARD_FAULT);

	adreno_dispatcher_schedule(device);

	adreno_set_gpu_fault(adreno_dev, ADRENO_HARD_FAULT);

	adreno_dispatcher_schedule(KGSL_DEVICE(adreno_dev));

}



 /*
@@ -727,7 +722,7 @@ void adreno_hang_int_callback(struct adreno_device *adreno_dev, int bit) 
 */

void adreno_cp_callback(struct adreno_device *adreno_dev, int bit)

{

	struct kgsl_device *device = &adreno_dev->dev;

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);



	kgsl_schedule_work(&device->event_work);

	adreno_dispatcher_schedule(device);
@@ -798,16 +793,16 @@ adreno_identify_gpu(struct adreno_device *adreno_dev) 
	struct adreno_gpudev *gpudev;

	int i;



	if (kgsl_property_read_u32(&adreno_dev->dev, "qcom,chipid",

	if (kgsl_property_read_u32(KGSL_DEVICE(adreno_dev), "qcom,chipid",

		&adreno_dev->chipid))

		KGSL_DRV_FATAL(&adreno_dev->dev,

		KGSL_DRV_FATAL(KGSL_DEVICE(adreno_dev),

			"No GPU chip ID was specified\n");



	adreno_dev->gpucore = _get_gpu_core(adreno_dev->chipid);



	if (adreno_dev->gpucore == NULL)

		KGSL_DRV_FATAL(&adreno_dev->dev, "Unknown GPU chip ID %8.8X\n",

			adreno_dev->chipid);

		KGSL_DRV_FATAL(KGSL_DEVICE(adreno_dev),

			"Unknown GPU chip ID %8.8X\n", adreno_dev->chipid);



	/*

	 * The gmem size might be dynamic when ocmem is involved so copy it out
@@ -849,7 +844,7 @@ static const struct of_device_id adreno_match_table[] = { 
static int adreno_of_parse_pwrlevels(struct adreno_device *adreno_dev,

		struct device_node *node)

{

	struct kgsl_device *device = &adreno_dev->dev;

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	struct kgsl_pwrctrl *pwr = &device->pwrctrl;

	struct device_node *child;
@@ -949,7 +944,7 @@ static struct { 
static int adreno_of_get_power(struct adreno_device *adreno_dev,

		struct platform_device *pdev)

{

	struct kgsl_device *device = &adreno_dev->dev;

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	struct kgsl_pwrctrl *pwr = &device->pwrctrl;

	struct device_node *node = pdev->dev.of_node;

	int i, init_level;
@@ -1065,7 +1060,7 @@ static int adreno_probe(struct platform_device *pdev) 
		return -ENODEV;

	}



	device = &adreno_dev->dev;

	device = KGSL_DEVICE(adreno_dev);

	device->pdev = pdev;

	device->mmu.priv = &device_3d0_iommu;
@@ -1114,7 +1109,7 @@ static int adreno_probe(struct platform_device *pdev) 
	adreno_debugfs_init(adreno_dev);

	adreno_profile_init(adreno_dev);



	adreno_sysfs_init(device);

	adreno_sysfs_init(adreno_dev);



	kgsl_pwrscale_init(&pdev->dev, CONFIG_MSM_ADRENO_DEFAULT_GOVERNOR);
@@ -1143,7 +1138,8 @@ out: 


static void _adreno_free_memories(struct adreno_device *adreno_dev)

{

	struct kgsl_device *device = &adreno_dev->dev;

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);



	if (test_bit(ADRENO_DEVICE_CMDBATCH_PROFILE, &adreno_dev->priv))

		kgsl_free_global(device, &adreno_dev->cmdbatch_profile_buffer);
@@ -1169,7 +1165,7 @@ static int adreno_remove(struct platform_device *pdev) 
	if (adreno_dev == NULL)

		return 0;



	device = &adreno_dev->dev;

	device = KGSL_DEVICE(adreno_dev);



	/* The memory is fading */

	_adreno_free_memories(adreno_dev);
@@ -1177,7 +1173,7 @@ static int adreno_remove(struct platform_device *pdev) 
#ifdef CONFIG_INPUT

	input_unregister_handler(&adreno_input_handler);

#endif

	adreno_sysfs_close(device);

	adreno_sysfs_close(adreno_dev);



	adreno_coresight_remove(adreno_dev);

	adreno_profile_close(adreno_dev);
@@ -1332,7 +1328,7 @@ static int adreno_init(struct kgsl_device *device) 
	 */



	if (!adreno_is_a3xx(adreno_dev)) {

		int r = kgsl_allocate_global(&adreno_dev->dev,

		int r = kgsl_allocate_global(device,

			&adreno_dev->cmdbatch_profile_buffer, PAGE_SIZE, 0, 0);



		adreno_dev->cmdbatch_profile_index = 0;
@@ -1340,7 +1336,7 @@ static int adreno_init(struct kgsl_device *device) 
		if (r == 0) {

			set_bit(ADRENO_DEVICE_CMDBATCH_PROFILE,

				&adreno_dev->priv);

			kgsl_sharedmem_set(&adreno_dev->dev,

			kgsl_sharedmem_set(device,

				&adreno_dev->cmdbatch_profile_buffer, 0, 0,

				PAGE_SIZE);

		}
@@ -1433,7 +1429,7 @@ static uint64_t _read_throttling_counters(struct adreno_device *adreno_dev) 
		if (!adreno_dev->gpmu_throttle_counters[i])

			return 0;



		th[i] = counter_delta(adreno_dev,

		th[i] = counter_delta(KGSL_DEVICE(adreno_dev),

			adreno_dev->gpmu_throttle_counters[i],

			&busy->throttle_cycles[i]);

	}
@@ -1446,7 +1442,8 @@ static void _update_threshold_count(struct adreno_device *adreno_dev, 
	uint64_t adj)

{

	if (adreno_is_a530(adreno_dev))

		kgsl_regread(&adreno_dev->dev, adreno_dev->lm_threshold_count,

		kgsl_regread(KGSL_DEVICE(adreno_dev),

			adreno_dev->lm_threshold_count,

			&adreno_dev->lm_threshold_cross);

	else if (adreno_is_a540(adreno_dev))

		adreno_dev->lm_threshold_cross = adj;
@@ -1461,7 +1458,7 @@ static void _update_threshold_count(struct adreno_device *adreno_dev, 
 */

static int _adreno_start(struct adreno_device *adreno_dev)

{

	struct kgsl_device *device = &adreno_dev->dev;

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	struct adreno_gpudev *gpudev = ADRENO_GPU_DEVICE(adreno_dev);

	int status = -EINVAL, ret;

	unsigned int state = device->state;
@@ -2094,9 +2091,9 @@ static int adreno_setproperty(struct kgsl_device_private *dev_priv, 
			if (enable) {

				device->pwrctrl.ctrl_flags = 0;



				if (!kgsl_active_count_get(&adreno_dev->dev)) {

				if (!kgsl_active_count_get(device)) {

					adreno_fault_detect_start(adreno_dev);

					kgsl_active_count_put(&adreno_dev->dev);

					kgsl_active_count_put(device);

				}



				kgsl_pwrscale_enable(device);
@@ -2304,17 +2301,16 @@ bool adreno_isidle(struct kgsl_device *device) 


/**

 * adreno_spin_idle() - Spin wait for the GPU to idle

 * @device: Pointer to the KGSL device

 * @adreno_dev: Pointer to an adreno device

 * @timeout: milliseconds to wait before returning error

 *

 * Spin the CPU waiting for the RBBM status to return idle

 */

int adreno_spin_idle(struct kgsl_device *device, unsigned int timeout)

int adreno_spin_idle(struct adreno_device *adreno_dev, unsigned int timeout)

{

	struct adreno_device *adreno_dev = ADRENO_DEVICE(device);

	unsigned long wait = jiffies + msecs_to_jiffies(timeout);



	kgsl_cffdump_regpoll(device,

	kgsl_cffdump_regpoll(KGSL_DEVICE(adreno_dev),

		adreno_getreg(adreno_dev, ADRENO_REG_RBBM_STATUS) << 2,

		0x00000000, 0x80000000);
@@ -2329,7 +2325,7 @@ int adreno_spin_idle(struct kgsl_device *device, unsigned int timeout) 
		if (adreno_gpu_fault(adreno_dev) != 0)

			return -EDEADLK;



		if (adreno_isidle(device))

		if (adreno_isidle(KGSL_DEVICE(adreno_dev)))

			return 0;

	}
@@ -2366,7 +2362,7 @@ int adreno_idle(struct kgsl_device *device) 
	if (ret)

		return ret;



	return adreno_spin_idle(device, ADRENO_IDLE_TIMEOUT);

	return adreno_spin_idle(adreno_dev, ADRENO_IDLE_TIMEOUT);

}



/**
@@ -2529,14 +2525,15 @@ static int adreno_waittimestamp(struct kgsl_device *device, 


/**

 * __adreno_readtimestamp() - Reads the timestamp from memstore memory

 * @device: Pointer to device whose memstore is read

 * @adreno_dev: Pointer to an adreno device

 * @index: Index into the memstore memory

 * @type: Type of timestamp to read

 * @timestamp: The out parameter where the timestamp is read

 */

static int __adreno_readtimestamp(struct kgsl_device *device, int index,

static int __adreno_readtimestamp(struct adreno_device *adreno_dev, int index,

				int type, unsigned int *timestamp)

{

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	int status = 0;



	switch (type) {
@@ -2559,7 +2556,7 @@ static int __adreno_readtimestamp(struct kgsl_device *device, int index, 
/**

 * adreno_rb_readtimestamp(): Return the value of given type of timestamp

 * for a RB

 * @device: GPU device whose timestamp values are being queried

 * @adreno_dev: adreno device whose timestamp values are being queried

 * @priv: The object being queried for a timestamp (expected to be a rb pointer)

 * @type: The type of timestamp (one of 3) to be read

 * @timestamp: Pointer to where the read timestamp is to be written to
@@ -2571,7 +2568,7 @@ static int __adreno_readtimestamp(struct kgsl_device *device, int index, 
 * The function returns 0 on success and timestamp value at the *timestamp

 * address and returns -EINVAL on any read error/invalid type and timestamp = 0.

 */

int adreno_rb_readtimestamp(struct kgsl_device *device,

int adreno_rb_readtimestamp(struct adreno_device *adreno_dev,

		void *priv, enum kgsl_timestamp_type type,

		unsigned int *timestamp)

{
@@ -2588,7 +2585,7 @@ int adreno_rb_readtimestamp(struct kgsl_device *device, 
	if (KGSL_TIMESTAMP_QUEUED == type)

		*timestamp = rb->timestamp;

	else

		status = __adreno_readtimestamp(device,

		status = __adreno_readtimestamp(adreno_dev,

				rb->id + KGSL_MEMSTORE_MAX,

				type, timestamp);
@@ -2628,7 +2625,7 @@ static int adreno_readtimestamp(struct kgsl_device *device, 
	if (KGSL_TIMESTAMP_QUEUED == type)

		*timestamp = adreno_context_timestamp(context);

	else

		status = __adreno_readtimestamp(device,

		status = __adreno_readtimestamp(ADRENO_DEVICE(device),

				context->id, type, timestamp);



	return status;
@@ -2640,10 +2637,9 @@ static inline s64 adreno_ticks_to_us(u32 ticks, u32 freq) 
	return ticks / freq;

}



static unsigned int counter_delta(struct adreno_device *adreno_dev,

static unsigned int counter_delta(struct kgsl_device *device,

			unsigned int reg, unsigned int *counter)

{

	struct kgsl_device *device = &adreno_dev->dev;

	unsigned int val;

	unsigned int ret = 0;
@@ -2683,7 +2679,7 @@ static void adreno_power_stats(struct kgsl_device *device, 
	if (adreno_dev->perfctr_pwr_lo != 0) {

		uint64_t gpu_busy;



		gpu_busy = counter_delta(adreno_dev, adreno_dev->perfctr_pwr_lo,

		gpu_busy = counter_delta(device, adreno_dev->perfctr_pwr_lo,

			&busy->gpu_busy);



		adj = _read_throttling_counters(adreno_dev);
@@ -2696,12 +2692,12 @@ static void adreno_power_stats(struct kgsl_device *device, 
		uint64_t ram_cycles = 0, starved_ram = 0;



		if (adreno_dev->ram_cycles_lo != 0)

			ram_cycles = counter_delta(adreno_dev,

			ram_cycles = counter_delta(device,

				adreno_dev->ram_cycles_lo,

				&busy->vbif_ram_cycles);



		if (adreno_dev->starved_ram_lo != 0)

			starved_ram = counter_delta(adreno_dev,

			starved_ram = counter_delta(device,

				adreno_dev->starved_ram_lo,

				&busy->vbif_starved_ram);

drivers/gpu/msm/adreno.h

+13 −9
Original line number Diff line number Diff line
@@ -39,6 +39,9 @@ 
#define ADRENO_DEVICE(device) \

		container_of(device, struct adreno_device, dev)



/* KGSL_DEVICE - given an adreno_device, return the KGSL device struct */

#define KGSL_DEVICE(_dev) (&((_dev)->dev))



/* ADRENO_CONTEXT - Given a context return the adreno context struct */

#define ADRENO_CONTEXT(context) \

		container_of(context, struct adreno_context, base)
@@ -813,7 +816,7 @@ long adreno_ioctl_helper(struct kgsl_device_private *dev_priv, 
		unsigned int cmd, unsigned long arg,

		const struct kgsl_ioctl *cmds, int len);



int adreno_spin_idle(struct kgsl_device *device, unsigned int timeout);

int adreno_spin_idle(struct adreno_device *device, unsigned int timeout);

int adreno_idle(struct kgsl_device *device);

bool adreno_isidle(struct kgsl_device *device);
@@ -831,7 +834,7 @@ void adreno_snapshot(struct kgsl_device *device, 


int adreno_reset(struct kgsl_device *device, int fault);



void adreno_fault_skipcmd_detached(struct kgsl_device *device,

void adreno_fault_skipcmd_detached(struct adreno_device *adreno_dev,

					 struct adreno_context *drawctxt,

					 struct kgsl_cmdbatch *cmdbatch);
@@ -871,8 +874,8 @@ unsigned int adreno_iommu_set_pt_generate_cmds( 
				unsigned int *cmds,

				struct kgsl_pagetable *pt);



int adreno_sysfs_init(struct kgsl_device *device);

void adreno_sysfs_close(struct kgsl_device *device);

int adreno_sysfs_init(struct adreno_device *adreno_dev);

void adreno_sysfs_close(struct adreno_device *adreno_dev);



void adreno_irqctrl(struct adreno_device *adreno_dev, int state);
@@ -1039,7 +1042,7 @@ static inline void adreno_readreg(struct adreno_device *adreno_dev, 
{

	struct adreno_gpudev *gpudev = ADRENO_GPU_DEVICE(adreno_dev);

	if (adreno_checkreg_off(adreno_dev, offset_name))

		kgsl_regread(&adreno_dev->dev,

		kgsl_regread(KGSL_DEVICE(adreno_dev),

				gpudev->reg_offsets->offsets[offset_name], val);

	else

		*val = 0;
@@ -1057,7 +1060,7 @@ static inline void adreno_writereg(struct adreno_device *adreno_dev, 
{

	struct adreno_gpudev *gpudev = ADRENO_GPU_DEVICE(adreno_dev);

	if (adreno_checkreg_off(adreno_dev, offset_name))

		kgsl_regwrite(&adreno_dev->dev,

		kgsl_regwrite(KGSL_DEVICE(adreno_dev),

				gpudev->reg_offsets->offsets[offset_name], val);

}
@@ -1180,7 +1183,7 @@ static inline void adreno_vbif_start(struct adreno_device *adreno_dev, 
	}



	while ((vbif != NULL) && (vbif->reg != 0)) {

		kgsl_regwrite(&adreno_dev->dev, vbif->reg, vbif->val);

		kgsl_regwrite(KGSL_DEVICE(adreno_dev), vbif->reg, vbif->val);

		vbif++;

	}

}
@@ -1227,7 +1230,7 @@ static inline void adreno_set_protected_registers( 


	val = 0x60000000 | ((mask_len & 0x1F) << 24) | ((reg << 2) & 0xFFFFF);



	kgsl_regwrite(&adreno_dev->dev, base + offset, val);

	kgsl_regwrite(KGSL_DEVICE(adreno_dev), base + offset, val);

	*index = *index + 1;

}
@@ -1373,7 +1376,8 @@ static inline void adreno_set_active_ctxs_null(struct adreno_device *adreno_dev) 
		if (rb->drawctxt_active)

			kgsl_context_put(&(rb->drawctxt_active->base));

		rb->drawctxt_active = NULL;

		kgsl_sharedmem_writel(&adreno_dev->dev, &rb->pagetable_desc,

		kgsl_sharedmem_writel(KGSL_DEVICE(adreno_dev),

			&rb->pagetable_desc,

			offsetof(struct adreno_ringbuffer_pagetable_info,

				current_rb_ptname), 0);

	}

drivers/gpu/msm/adreno_a3xx.c

+22 −43
Original line number Diff line number Diff line
@@ -171,7 +171,7 @@ int adreno_a3xx_pwron_fixup_init(struct adreno_device *adreno_dev) 
	if (test_bit(ADRENO_DEVICE_PWRON_FIXUP, &adreno_dev->priv))

		return 0;



	ret = kgsl_allocate_global(&adreno_dev->dev,

	ret = kgsl_allocate_global(KGSL_DEVICE(adreno_dev),

		&adreno_dev->pwron_fixup, PAGE_SIZE,

		KGSL_MEMFLAGS_GPUREADONLY, 0);
@@ -655,7 +655,7 @@ static int a3xx_rb_init(struct adreno_device *adreno_dev, 


	ret = adreno_ringbuffer_submit_spin(rb, NULL, 2000);

	if (ret) {

		struct kgsl_device *device = &adreno_dev->dev;

		struct kgsl_device *device = KGSL_DEVICE(adreno_dev);



		dev_err(device->dev, "CP initialization failed to idle\n");

		kgsl_device_snapshot(device, NULL);
@@ -671,7 +671,7 @@ static int a3xx_rb_init(struct adreno_device *adreno_dev, 
 */

static void a3xx_err_callback(struct adreno_device *adreno_dev, int bit)

{

	struct kgsl_device *device = &adreno_dev->dev;

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	unsigned int reg;



	switch (bit) {
@@ -1220,7 +1220,7 @@ static void a3xx_perfcounter_close(struct adreno_device *adreno_dev) 
 */

static void a3xx_protect_init(struct adreno_device *adreno_dev)

{

	struct kgsl_device *device = &adreno_dev->dev;

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	int index = 0;

	struct kgsl_protected_registers *iommu_regs;
@@ -1259,7 +1259,7 @@ static void a3xx_protect_init(struct adreno_device *adreno_dev) 


static void a3xx_start(struct adreno_device *adreno_dev)

{

	struct kgsl_device *device = &adreno_dev->dev;

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	struct adreno_gpudev *gpudev = ADRENO_GPU_DEVICE(adreno_dev);



	adreno_vbif_start(adreno_dev, a3xx_vbif_platforms,
@@ -1500,7 +1500,7 @@ static int _load_firmware(struct kgsl_device *device, const char *fwfile, 


int a3xx_microcode_read(struct adreno_device *adreno_dev)

{

	struct kgsl_device *device = &adreno_dev->dev;

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);



	if (adreno_dev->pm4_fw == NULL) {

		int len;
@@ -1555,51 +1555,43 @@ int a3xx_microcode_read(struct adreno_device *adreno_dev) 


	return 0;

}



/**

 * adreno_ringbuffer_load_pm4_ucode() - Load pm4 ucode

 * @device: Pointer to a KGSL device

 * load_pm4_ucode() - Load pm4 ucode

 * @adreno_dev: Pointer to an adreno device

 * @start: Starting index in pm4 ucode to load

 * @end: Ending index of pm4 ucode to load

 * @addr: Address to load the pm4 ucode

 *

 * Load the pm4 ucode from @start at @addr.

 */

static inline int adreno_ringbuffer_load_pm4_ucode(struct kgsl_device *device,

static inline void load_pm4_ucode(struct adreno_device *adreno_dev,

			unsigned int start, unsigned int end, unsigned int addr)

{

	struct adreno_device *adreno_dev = ADRENO_DEVICE(device);

	int i;



	adreno_writereg(adreno_dev, ADRENO_REG_CP_ME_RAM_WADDR, addr);

	for (i = start; i < end; i++)

		adreno_writereg(adreno_dev, ADRENO_REG_CP_ME_RAM_DATA,

					adreno_dev->pm4_fw[i]);



	return 0;

}



/**

 * adreno_ringbuffer_load_pfp_ucode() - Load pfp ucode

 * @device: Pointer to a KGSL device

 * load_pfp_ucode() - Load pfp ucode

 * @adreno_dev: Pointer to an adreno device

 * @start: Starting index in pfp ucode to load

 * @end: Ending index of pfp ucode to load

 * @addr: Address to load the pfp ucode

 *

 * Load the pfp ucode from @start at @addr.

 */

static inline int adreno_ringbuffer_load_pfp_ucode(struct kgsl_device *device,

static inline void load_pfp_ucode(struct adreno_device *adreno_dev,

			unsigned int start, unsigned int end, unsigned int addr)

{

	struct adreno_device *adreno_dev = ADRENO_DEVICE(device);

	int i;



	adreno_writereg(adreno_dev, ADRENO_REG_CP_PFP_UCODE_ADDR, addr);

	for (i = start; i < end; i++)

		adreno_writereg(adreno_dev, ADRENO_REG_CP_PFP_UCODE_DATA,

						adreno_dev->pfp_fw[i]);



	return 0;

}



/**
@@ -1624,7 +1616,7 @@ static inline int adreno_ringbuffer_load_pfp_ucode(struct kgsl_device *device, 
static int _ringbuffer_bootstrap_ucode(struct adreno_device *adreno_dev,

		struct adreno_ringbuffer *rb, unsigned int load_jt)

{

	struct kgsl_device *device = &adreno_dev->dev;

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	unsigned int *cmds, bootstrap_size, rb_size;

	int i = 0;

	int ret;
@@ -1728,7 +1720,7 @@ static int _ringbuffer_bootstrap_ucode(struct adreno_device *adreno_dev, 
	}



	/* idle device to validate bootstrap */

	ret = adreno_spin_idle(device, 2000);

	ret = adreno_spin_idle(adreno_dev, 2000);



	if (ret) {

		KGSL_DRV_ERR(device, "microcode bootstrap failed to idle\n");
@@ -1748,7 +1740,6 @@ int a3xx_microcode_load(struct adreno_device *adreno_dev, 
{

	int status;

	struct adreno_ringbuffer *rb = ADRENO_CURRENT_RINGBUFFER(adreno_dev);

	struct kgsl_device *device = &adreno_dev->dev;



	if (start_type == ADRENO_START_COLD) {

		/* If bootstrapping if supported to load ucode */
@@ -1764,15 +1755,11 @@ int a3xx_microcode_load(struct adreno_device *adreno_dev, 
			 * microcode.

			 */



			status = adreno_ringbuffer_load_pm4_ucode(device, 1,

			load_pm4_ucode(adreno_dev, 1,

				adreno_dev->gpucore->pm4_bstrp_size+1, 0);

			if (status != 0)

				return status;



			status = adreno_ringbuffer_load_pfp_ucode(device, 1,

			load_pfp_ucode(adreno_dev, 1,

				adreno_dev->gpucore->pfp_bstrp_size+1, 0);

			if (status != 0)

				return status;



			/* Bootstrap rest of the ucode here */

			status = _ringbuffer_bootstrap_ucode(adreno_dev, rb, 0);
@@ -1781,16 +1768,12 @@ int a3xx_microcode_load(struct adreno_device *adreno_dev, 


		} else {

			/* load the CP ucode using AHB writes */

			status = adreno_ringbuffer_load_pm4_ucode(device, 1,

						adreno_dev->pm4_fw_size, 0);

			if (status != 0)

				return status;

			load_pm4_ucode(adreno_dev, 1, adreno_dev->pm4_fw_size,

				0);



			/* load the prefetch parser ucode using AHB writes */

			status = adreno_ringbuffer_load_pfp_ucode(device, 1,

						adreno_dev->pfp_fw_size, 0);

			if (status != 0)

				return status;

			load_pfp_ucode(adreno_dev, 1, adreno_dev->pfp_fw_size,

				0);

		}

	} else if (start_type == ADRENO_START_WARM) {

			/* If bootstrapping if supported to load jump tables */
@@ -1801,22 +1784,18 @@ int a3xx_microcode_load(struct adreno_device *adreno_dev, 


		} else {

			/* load the CP jump tables using AHB writes */

			status = adreno_ringbuffer_load_pm4_ucode(device,

			load_pm4_ucode(adreno_dev,

				adreno_dev->gpucore->pm4_jt_idx,

				adreno_dev->pm4_fw_size,

				adreno_dev->gpucore->pm4_jt_addr);

			if (status != 0)

				return status;



			/*

			 * load the prefetch parser jump tables using AHB writes

			 */

			status = adreno_ringbuffer_load_pfp_ucode(device,

			load_pfp_ucode(adreno_dev,

				adreno_dev->gpucore->pfp_jt_idx,

				adreno_dev->pfp_fw_size,

				adreno_dev->gpucore->pfp_jt_addr);

			if (status != 0)

				return status;

		}

	} else

		return -EINVAL;

drivers/gpu/msm/adreno_a3xx_snapshot.c

+2 −2
Original line number Diff line number Diff line 
/* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved.

/* Copyright (c) 2012-2016, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -296,7 +296,7 @@ static void _snapshot_hlsq_regs(struct kgsl_device *device, 
void a3xx_snapshot(struct adreno_device *adreno_dev,

		struct kgsl_snapshot *snapshot)

{

	struct kgsl_device *device = &adreno_dev->dev;

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	struct adreno_gpudev *gpudev = ADRENO_GPU_DEVICE(adreno_dev);

	struct adreno_snapshot_data *snap_data = gpudev->snapshot_data;

	unsigned int reg;

drivers/gpu/msm/adreno_a4xx.c

+22 −19
Original line number Diff line number Diff line
@@ -182,7 +182,7 @@ static const struct adreno_vbif_platform a4xx_vbif_platforms[] = { 
static void a4xx_preemption_start(struct adreno_device *adreno_dev,

		struct adreno_ringbuffer *rb)

{

	struct kgsl_device *device = &adreno_dev->dev;

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	uint32_t val;



	/*
@@ -220,7 +220,7 @@ static void a4xx_preemption_start(struct adreno_device *adreno_dev, 
static void a4xx_preemption_save(struct adreno_device *adreno_dev,

		struct adreno_ringbuffer *rb)

{

	struct kgsl_device *device = &adreno_dev->dev;

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);



	kgsl_regread(device, A4XX_CP_SCRATCH_REG18, &rb->rptr);

	kgsl_regread(device, A4XX_CP_SCRATCH_REG23, &rb->gpr11);
@@ -250,7 +250,7 @@ static int a4xx_preemption_pre_ibsubmit( 
			struct kgsl_context *context, uint64_t cond_addr,

			struct kgsl_memobj_node *ib)

{

	struct kgsl_device *device = &adreno_dev->dev;

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	unsigned int *cmds_orig = cmds;

	int exec_ib = 0;
@@ -290,7 +290,8 @@ static int a4xx_preemption_pre_ibsubmit( 
static bool a4xx_is_sptp_idle(struct adreno_device *adreno_dev)

{

	unsigned int reg;

	struct kgsl_device *device = &adreno_dev->dev;

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);



	if (!ADRENO_FEATURE(adreno_dev, ADRENO_SPTP_PC))

		return true;
@@ -314,7 +315,8 @@ static bool a4xx_is_sptp_idle(struct adreno_device *adreno_dev) 
static int a4xx_regulator_enable(struct adreno_device *adreno_dev)

{

	unsigned int reg;

	struct kgsl_device *device = &adreno_dev->dev;

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);



	if (!(adreno_is_a430(adreno_dev) || adreno_is_a418(adreno_dev)))

		return 0;
@@ -337,7 +339,8 @@ static int a4xx_regulator_enable(struct adreno_device *adreno_dev) 
 */

static void a4xx_regulator_disable(struct adreno_device *adreno_dev)

{

	struct kgsl_device *device = &adreno_dev->dev;

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);



	if (!(adreno_is_a430(adreno_dev) || adreno_is_a418(adreno_dev)))

		return;
@@ -351,12 +354,12 @@ static void a4xx_regulator_disable(struct adreno_device *adreno_dev) 
 */

static void a4xx_enable_pc(struct adreno_device *adreno_dev)

{

	struct kgsl_device *device = &adreno_dev->dev;

	if (!ADRENO_FEATURE(adreno_dev, ADRENO_SPTP_PC) ||

		!test_bit(ADRENO_SPTP_PC_CTRL, &adreno_dev->pwrctrl_flag))

		return;



	kgsl_regwrite(device, A4XX_CP_POWER_COLLAPSE_CNTL, 0x00400010);

	kgsl_regwrite(KGSL_DEVICE(adreno_dev), A4XX_CP_POWER_COLLAPSE_CNTL,

		0x00400010);

	trace_adreno_sp_tp((unsigned long) __builtin_return_address(0));

};
@@ -369,7 +372,7 @@ static void a4xx_enable_pc(struct adreno_device *adreno_dev) 
 */

static void a4xx_enable_ppd(struct adreno_device *adreno_dev)

{

	struct kgsl_device *device = &adreno_dev->dev;

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);



	if (!ADRENO_FEATURE(adreno_dev, ADRENO_PPD) ||

		!test_bit(ADRENO_PPD_CTRL, &adreno_dev->pwrctrl_flag) ||
@@ -401,7 +404,7 @@ static void a4xx_pwrlevel_change_settings(struct adreno_device *adreno_dev, 
				unsigned int prelevel, unsigned int postlevel,

				bool post)

{

	struct kgsl_device *device = &adreno_dev->dev;

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	static int pre;



	/* PPD programming only for A430v2 */
@@ -563,7 +566,7 @@ static void a4xx_enable_hwcg(struct kgsl_device *device) 
 */

static void a4xx_protect_init(struct adreno_device *adreno_dev)

{

	struct kgsl_device *device = &adreno_dev->dev;

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	int index = 0;

	struct kgsl_protected_registers *iommu_regs;
@@ -628,7 +631,7 @@ static struct adreno_snapshot_sizes a4xx_snap_sizes = { 


static void a4xx_start(struct adreno_device *adreno_dev)

{

	struct kgsl_device *device = &adreno_dev->dev;

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	struct adreno_gpudev *gpudev = ADRENO_GPU_DEVICE(adreno_dev);

	unsigned int cp_debug = A4XX_CP_DEBUG_DEFAULT;
@@ -730,7 +733,7 @@ static void a4xx_start(struct adreno_device *adreno_dev) 
 */

static void a4xx_err_callback(struct adreno_device *adreno_dev, int bit)

{

	struct kgsl_device *device = &adreno_dev->dev;

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	unsigned int reg;



	switch (bit) {
@@ -1457,7 +1460,7 @@ int adreno_a4xx_pwron_fixup_init(struct adreno_device *adreno_dev) 
	if (test_bit(ADRENO_DEVICE_PWRON_FIXUP, &adreno_dev->priv))

			return 0;



	ret = kgsl_allocate_global(&adreno_dev->dev,

	ret = kgsl_allocate_global(KGSL_DEVICE(adreno_dev),

		&adreno_dev->pwron_fixup, PAGE_SIZE,

		KGSL_MEMFLAGS_GPUREADONLY, 0);
@@ -1619,7 +1622,7 @@ static int a4xx_rb_init(struct adreno_device *adreno_dev, 


	ret = adreno_ringbuffer_submit_spin(rb, NULL, 2000);

	if (ret) {

		struct kgsl_device *device = &adreno_dev->dev;

		struct kgsl_device *device = KGSL_DEVICE(adreno_dev);



		dev_err(device->dev, "CP initialization failed to idle\n");

		kgsl_device_snapshot(device, NULL);
@@ -1804,7 +1807,7 @@ static void a4xx_preempt_trig_state( 
			struct adreno_device *adreno_dev)

{

	struct adreno_dispatcher *dispatcher = &adreno_dev->dispatcher;

	struct kgsl_device *device = &(adreno_dev->dev);

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	unsigned int rbbase, val;



	/*
@@ -1902,7 +1905,7 @@ static void a4xx_preempt_clear_state( 


{

	struct adreno_dispatcher *dispatcher = &adreno_dev->dispatcher;

	struct kgsl_device *device = &(adreno_dev->dev);

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	struct adreno_dispatcher_cmdqueue *dispatch_tempq;

	struct kgsl_cmdbatch *cmdbatch;

	struct adreno_ringbuffer *highest_busy_rb;
@@ -2020,7 +2023,7 @@ static void a4xx_preempt_complete_state( 


{

	struct adreno_dispatcher *dispatcher = &adreno_dev->dispatcher;

	struct kgsl_device *device = &(adreno_dev->dev);

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	struct adreno_dispatcher_cmdqueue *dispatch_q;

	unsigned int wptr, rbbase;

	unsigned int val, val1;
@@ -2108,7 +2111,7 @@ static void a4xx_preemption_schedule( 
				struct adreno_device *adreno_dev)

{

	struct adreno_dispatcher *dispatcher = &adreno_dev->dispatcher;

	struct kgsl_device *device = &(adreno_dev->dev);

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);



	if (!adreno_is_preemption_enabled(adreno_dev))

		return;