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Commit d596043d authored by Darrick J. Wong's avatar Darrick J. Wong Committed by H. Peter Anvin
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x86, Calgary: Limit the max PHB number to 256 



The x3950 family can have as many as 256 PCI buses in a single system, so
change the limits to the maximum.  Since there can only be 256 PCI buses in one
domain, we no longer need the BUG_ON check.

Signed-off-by: default avatarDarrick J. Wong <djwong@us.ibm.com>
LKML-Reference: <20100701004519.GQ15515@tux1.beaverton.ibm.com>
Signed-off-by: default avatarH. Peter Anvin <hpa@zytor.com>
parent 980019d7

arch/x86/kernel/pci-calgary_64.c

+1 −3
Original line number Diff line number Diff line
@@ -110,7 +110,7 @@ int use_calgary __read_mostly = 0; 
 * x3950 (PCIE): 8 chassis, 32 PHBs per chassis   = 256

 * x3950 (PCIX): 8 chassis, 16 PHBs per chassis   = 128

 */

#define MAX_PHB_BUS_NUM		384

#define MAX_PHB_BUS_NUM		256



#define PHBS_PER_CALGARY	  4
@@ -1056,8 +1056,6 @@ static int __init calgary_init_one(struct pci_dev *dev) 
	struct iommu_table *tbl;

	int ret;



	BUG_ON(dev->bus->number >= MAX_PHB_BUS_NUM);



	bbar = busno_to_bbar(dev->bus->number);

	ret = calgary_setup_tar(dev, bbar);

	if (ret)