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Commit d4591762 authored by Alex Shi's avatar Alex Shi
Browse files

Merge branch 'lsk-v3.18-android' of... 

Merge branch 'lsk-v3.18-android' of git://android.git.linaro.org/kernel/linaro-android into linux-linaro-lsk-v3.18-android
parents 3c0fa538 6bf100b6

android/configs/android-recommended.cfg

+1 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ 
# CONFIG_VT is not set

CONFIG_ANDROID_TIMED_GPIO=y

CONFIG_ARM_KERNMEM_PERMS=y

CONFIG_ARM64_SW_TTBR0_PAN=y

CONFIG_ASYMMETRIC_KEY_TYPE=y

CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y

CONFIG_BACKLIGHT_LCD_SUPPORT=y

arch/arm64/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -599,7 +599,7 @@ config SETEND_EMULATION 
endif



config ARM64_SW_TTBR0_PAN

	bool "Emulate Priviledged Access Never using TTBR0_EL1 switching"

	bool "Emulate Privileged Access Never using TTBR0_EL1 switching"

	help

	  Enabling this option prevents the kernel from accessing

	  user-space memory directly by pointing TTBR0_EL1 to a reserved

arch/arm64/include/asm/alternative.h

+53 −17
Original line number Diff line number Diff line
@@ -2,6 +2,7 @@ 
#define __ASM_ALTERNATIVE_H



#include <asm/cpufeature.h>

#include <asm/insn.h>



#ifndef __ASSEMBLY__
@@ -91,34 +92,55 @@ void free_alternatives_memory(void); 
.endm



/*

 * Begin an alternative code sequence.

 * Alternative sequences

 *

 * The code for the case where the capability is not present will be

 * assembled and linked as normal. There are no restrictions on this

 * code.

 *

 * The code for the case where the capability is present will be

 * assembled into a special section to be used for dynamic patching.

 * Code for that case must:

 *

 * 1. Be exactly the same length (in bytes) as the default code

 *    sequence.

 *

 * The code that follows this macro will be assembled and linked as

 * normal. There are no restrictions on this code.

 * 2. Not contain a branch target that is used outside of the

 *    alternative sequence it is defined in (branches into an

 *    alternative sequence are not fixed up).

 */



/*

 * Begin an alternative code sequence.

 */

.macro alternative_if_not cap

	.set .Lasm_alt_mode, 0

	.pushsection .altinstructions, "a"

	altinstruction_entry 661f, 663f, \cap, 662f-661f, 664f-663f

	.popsection

661:

.endm



.macro alternative_if cap

	.set .Lasm_alt_mode, 1

	.pushsection .altinstructions, "a"

	altinstruction_entry 663f, 661f, \cap, 664f-663f, 662f-661f

	.popsection

	.pushsection .altinstr_replacement, "ax"

	.align 2	/* So GAS knows label 661 is suitably aligned */

661:

.endm



/*

 * Provide the alternative code sequence.

 *

 * The code that follows this macro is assembled into a special

 * section to be used for dynamic patching. Code that follows this

 * macro must:

 *

 * 1. Be exactly the same length (in bytes) as the default code

 *    sequence.

 *

 * 2. Not contain a branch target that is used outside of the

 *    alternative sequence it is defined in (branches into an

 *    alternative sequence are not fixed up).

 * Provide the other half of the alternative code sequence.

 */

.macro alternative_else

662:	.pushsection .altinstr_replacement, "ax"

662:

	.if .Lasm_alt_mode==0

	.pushsection .altinstr_replacement, "ax"

	.else

	.popsection

	.endif

663:

.endm
@@ -126,11 +148,25 @@ void free_alternatives_memory(void); 
 * Complete an alternative code sequence.

 */

.macro alternative_endif

664:	.popsection

664:

	.if .Lasm_alt_mode==0

	.popsection

	.endif

	.org	. - (664b-663b) + (662b-661b)

	.org	. - (662b-661b) + (664b-663b)

.endm



/*

 * Provides a trivial alternative or default sequence consisting solely

 * of NOPs. The number of NOPs is chosen automatically to match the

 * previous case.

 */

.macro alternative_else_nop_endif

alternative_else

	nops	(662b-661b) / AARCH64_INSN_SIZE

alternative_endif

.endm



#define _ALTERNATIVE_CFG(insn1, insn2, cap, cfg, ...)	\

	alternative_insn insn1, insn2, cap, IS_ENABLED(cfg)

arch/arm64/include/asm/assembler.h

+9 −0
Original line number Diff line number Diff line
@@ -117,6 +117,15 @@ 
	dmb	\opt

	.endm



/*

 * NOP sequence

 */

	.macro	nops, num

	.rept	\num

	nop

	.endr

	.endm



#define USER(l, x...)				\

9999:	x;					\

	.section __ex_table,"a";		\

arch/arm64/include/asm/barrier.h

+3 −0
Original line number Diff line number Diff line
@@ -20,6 +20,9 @@ 


#ifndef __ASSEMBLY__



#define __nops(n)	".rept	" #n "\nnop\n.endr\n"

#define nops(n)		asm volatile(__nops(n))



#define sev()		asm volatile("sev" : : : "memory")

#define wfe()		asm volatile("wfe" : : : "memory")

#define wfi()		asm volatile("wfi" : : : "memory")