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Commit d3f12d36 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'kvm-updates/2.6.30' of git://git.kernel.org/pub/scm/virt/kvm/kvm 

* 'kvm-updates/2.6.30' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (113 commits)
  KVM: VMX: Don't allow uninhibited access to EFER on i386
  KVM: Correct deassign device ioctl to IOW
  KVM: ppc: e500: Fix the bug that KVM is unstable in SMP
  KVM: ppc: e500: Fix the bug that mas0 update to wrong value when read TLB entry
  KVM: Fix missing smp tlb flush in invlpg
  KVM: Get support IRQ routing entry counts
  KVM: fix sparse warnings: Should it be static?
  KVM: fix sparse warnings: context imbalance
  KVM: is_long_mode() should check for EFER.LMA
  KVM: VMX: Update necessary state when guest enters long mode
  KVM: ia64: Fix the build errors due to lack of macros related to MSI.
  ia64: Move the macro definitions related to MSI to one header file.
  KVM: fix kvm_vm_ioctl_deassign_device
  KVM: define KVM_CAP_DEVICE_DEASSIGNMENT
  KVM: ppc: Add emulation of E500 register mmucsr0
  KVM: Report IRQ injection status for MSI delivered interrupts
  KVM: MMU: Fix another largepage memory leak
  KVM: SVM: set accessed bit for VMCB segment selectors
  KVM: Report IRQ injection status to userspace.
  KVM: MMU: remove assertion in kvm_mmu_alloc_page
  ...
parents 39b566ee 16175a79

arch/ia64/include/asm/kvm.h

+48 −1
Original line number Diff line number Diff line
@@ -166,7 +166,40 @@ struct saved_vpd { 
	unsigned long  vcpuid[5];

	unsigned long  vpsr;

	unsigned long  vpr;

	union {

		unsigned long  vcr[128];

		struct {

			unsigned long dcr;

			unsigned long itm;

			unsigned long iva;

			unsigned long rsv1[5];

			unsigned long pta;

			unsigned long rsv2[7];

			unsigned long ipsr;

			unsigned long isr;

			unsigned long rsv3;

			unsigned long iip;

			unsigned long ifa;

			unsigned long itir;

			unsigned long iipa;

			unsigned long ifs;

			unsigned long iim;

			unsigned long iha;

			unsigned long rsv4[38];

			unsigned long lid;

			unsigned long ivr;

			unsigned long tpr;

			unsigned long eoi;

			unsigned long irr[4];

			unsigned long itv;

			unsigned long pmv;

			unsigned long cmcv;

			unsigned long rsv5[5];

			unsigned long lrr0;

			unsigned long lrr1;

			unsigned long rsv6[46];

		};

	};

};



struct kvm_regs {
@@ -214,4 +247,18 @@ struct kvm_sregs { 
struct kvm_fpu {

};



#define KVM_IA64_VCPU_STACK_SHIFT	16

#define KVM_IA64_VCPU_STACK_SIZE	(1UL << KVM_IA64_VCPU_STACK_SHIFT)



struct kvm_ia64_vcpu_stack {

	unsigned char stack[KVM_IA64_VCPU_STACK_SIZE];

};



struct kvm_debug_exit_arch {

};



/* for KVM_SET_GUEST_DEBUG */

struct kvm_guest_debug_arch {

};



#endif

arch/ia64/include/asm/kvm_host.h

+11 −7
Original line number Diff line number Diff line
@@ -112,7 +112,11 @@ 
#define VCPU_STRUCT_SHIFT	16

#define VCPU_STRUCT_SIZE	(__IA64_UL_CONST(1) << VCPU_STRUCT_SHIFT)



#define KVM_STK_OFFSET		VCPU_STRUCT_SIZE

/*

 * This must match KVM_IA64_VCPU_STACK_{SHIFT,SIZE} arch/ia64/include/asm/kvm.h

 */

#define KVM_STK_SHIFT		16

#define KVM_STK_OFFSET		(__IA64_UL_CONST(1)<< KVM_STK_SHIFT)



#define KVM_VM_STRUCT_SHIFT	19

#define KVM_VM_STRUCT_SIZE	(__IA64_UL_CONST(1) << KVM_VM_STRUCT_SHIFT)
@@ -153,10 +157,10 @@ struct kvm_vm_data { 
	struct kvm_vcpu_data vcpu_data[KVM_MAX_VCPUS];

};



#define VCPU_BASE(n)	KVM_VM_DATA_BASE + \

				offsetof(struct kvm_vm_data, vcpu_data[n])

#define VM_BASE		KVM_VM_DATA_BASE + \

				offsetof(struct kvm_vm_data, kvm_vm_struct)

#define VCPU_BASE(n)	(KVM_VM_DATA_BASE + \

				offsetof(struct kvm_vm_data, vcpu_data[n]))

#define KVM_VM_BASE	(KVM_VM_DATA_BASE + \

				offsetof(struct kvm_vm_data, kvm_vm_struct))

#define KVM_MEM_DIRTY_LOG_BASE	KVM_VM_DATA_BASE + \

				offsetof(struct kvm_vm_data, kvm_mem_dirty_log)
@@ -235,8 +239,6 @@ struct kvm_vm_data { 


struct kvm;

struct kvm_vcpu;

struct kvm_guest_debug{

};



struct kvm_mmio_req {

	uint64_t addr;          /*  physical address		*/
@@ -462,6 +464,8 @@ struct kvm_arch { 
	unsigned long	metaphysical_rr4;

	unsigned long	vmm_init_rr;



	int		online_vcpus;



	struct kvm_ioapic *vioapic;

	struct kvm_vm_stat stat;

	struct kvm_sal_data rdv_sal_data;

arch/ia64/include/asm/msidef.h

0 → 100644
+42 −0
Original line number Diff line number Diff line 
#ifndef _IA64_MSI_DEF_H

#define _IA64_MSI_DEF_H



/*

 * Shifts for APIC-based data

 */



#define     MSI_DATA_VECTOR_SHIFT	0

#define	    MSI_DATA_VECTOR(v)		(((u8)v) << MSI_DATA_VECTOR_SHIFT)

#define     MSI_DATA_VECTOR_MASK	0xffffff00



#define     MSI_DATA_DELIVERY_MODE_SHIFT	8

#define     MSI_DATA_DELIVERY_FIXED	(0 << MSI_DATA_DELIVERY_MODE_SHIFT)

#define     MSI_DATA_DELIVERY_LOWPRI	(1 << MSI_DATA_DELIVERY_MODE_SHIFT)



#define     MSI_DATA_LEVEL_SHIFT	14

#define     MSI_DATA_LEVEL_DEASSERT	(0 << MSI_DATA_LEVEL_SHIFT)

#define     MSI_DATA_LEVEL_ASSERT	(1 << MSI_DATA_LEVEL_SHIFT)



#define     MSI_DATA_TRIGGER_SHIFT	15

#define     MSI_DATA_TRIGGER_EDGE	(0 << MSI_DATA_TRIGGER_SHIFT)

#define     MSI_DATA_TRIGGER_LEVEL	(1 << MSI_DATA_TRIGGER_SHIFT)



/*

 * Shift/mask fields for APIC-based bus address

 */



#define     MSI_ADDR_DEST_ID_SHIFT	4

#define     MSI_ADDR_HEADER		0xfee00000



#define     MSI_ADDR_DEST_ID_MASK	0xfff0000f

#define     MSI_ADDR_DEST_ID_CPU(cpu)	((cpu) << MSI_ADDR_DEST_ID_SHIFT)



#define     MSI_ADDR_DEST_MODE_SHIFT	2

#define     MSI_ADDR_DEST_MODE_PHYS	(0 << MSI_ADDR_DEST_MODE_SHIFT)

#define	    MSI_ADDR_DEST_MODE_LOGIC	(1 << MSI_ADDR_DEST_MODE_SHIFT)



#define     MSI_ADDR_REDIRECTION_SHIFT	3

#define     MSI_ADDR_REDIRECTION_CPU	(0 << MSI_ADDR_REDIRECTION_SHIFT)

#define     MSI_ADDR_REDIRECTION_LOWPRI	(1 << MSI_ADDR_REDIRECTION_SHIFT)



#endif/* _IA64_MSI_DEF_H */

arch/ia64/kernel/msi_ia64.c

+9 −46
Original line number Diff line number Diff line
@@ -7,44 +7,7 @@ 
#include <linux/msi.h>

#include <linux/dmar.h>

#include <asm/smp.h>



/*

 * Shifts for APIC-based data

 */



#define MSI_DATA_VECTOR_SHIFT		0

#define	    MSI_DATA_VECTOR(v)		(((u8)v) << MSI_DATA_VECTOR_SHIFT)

#define MSI_DATA_VECTOR_MASK		0xffffff00



#define MSI_DATA_DELIVERY_SHIFT		8

#define     MSI_DATA_DELIVERY_FIXED	(0 << MSI_DATA_DELIVERY_SHIFT)

#define     MSI_DATA_DELIVERY_LOWPRI	(1 << MSI_DATA_DELIVERY_SHIFT)



#define MSI_DATA_LEVEL_SHIFT		14

#define     MSI_DATA_LEVEL_DEASSERT	(0 << MSI_DATA_LEVEL_SHIFT)

#define     MSI_DATA_LEVEL_ASSERT	(1 << MSI_DATA_LEVEL_SHIFT)



#define MSI_DATA_TRIGGER_SHIFT		15

#define     MSI_DATA_TRIGGER_EDGE	(0 << MSI_DATA_TRIGGER_SHIFT)

#define     MSI_DATA_TRIGGER_LEVEL	(1 << MSI_DATA_TRIGGER_SHIFT)



/*

 * Shift/mask fields for APIC-based bus address

 */



#define MSI_TARGET_CPU_SHIFT		4

#define MSI_ADDR_HEADER			0xfee00000



#define MSI_ADDR_DESTID_MASK		0xfff0000f

#define     MSI_ADDR_DESTID_CPU(cpu)	((cpu) << MSI_TARGET_CPU_SHIFT)



#define MSI_ADDR_DESTMODE_SHIFT		2

#define     MSI_ADDR_DESTMODE_PHYS	(0 << MSI_ADDR_DESTMODE_SHIFT)

#define	    MSI_ADDR_DESTMODE_LOGIC	(1 << MSI_ADDR_DESTMODE_SHIFT)



#define MSI_ADDR_REDIRECTION_SHIFT	3

#define     MSI_ADDR_REDIRECTION_CPU	(0 << MSI_ADDR_REDIRECTION_SHIFT)

#define     MSI_ADDR_REDIRECTION_LOWPRI	(1 << MSI_ADDR_REDIRECTION_SHIFT)

#include <asm/msidef.h>



static struct irq_chip	ia64_msi_chip;
@@ -65,8 +28,8 @@ static void ia64_set_msi_irq_affinity(unsigned int irq, 
	read_msi_msg(irq, &msg);



	addr = msg.address_lo;

	addr &= MSI_ADDR_DESTID_MASK;

	addr |= MSI_ADDR_DESTID_CPU(cpu_physical_id(cpu));

	addr &= MSI_ADDR_DEST_ID_MASK;

	addr |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu));

	msg.address_lo = addr;



	data = msg.data;
@@ -98,9 +61,9 @@ int ia64_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc) 
	msg.address_hi = 0;

	msg.address_lo =

		MSI_ADDR_HEADER |

		MSI_ADDR_DESTMODE_PHYS |

		MSI_ADDR_DEST_MODE_PHYS |

		MSI_ADDR_REDIRECTION_CPU |

		MSI_ADDR_DESTID_CPU(dest_phys_id);

		MSI_ADDR_DEST_ID_CPU(dest_phys_id);



	msg.data =

		MSI_DATA_TRIGGER_EDGE |
@@ -183,8 +146,8 @@ static void dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask) 


	msg.data &= ~MSI_DATA_VECTOR_MASK;

	msg.data |= MSI_DATA_VECTOR(cfg->vector);

	msg.address_lo &= ~MSI_ADDR_DESTID_MASK;

	msg.address_lo |= MSI_ADDR_DESTID_CPU(cpu_physical_id(cpu));

	msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK;

	msg.address_lo |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu));



	dmar_msi_write(irq, &msg);

	irq_desc[irq].affinity = *mask;
@@ -215,9 +178,9 @@ msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg) 
	msg->address_hi = 0;

	msg->address_lo =

		MSI_ADDR_HEADER |

		MSI_ADDR_DESTMODE_PHYS |

		MSI_ADDR_DEST_MODE_PHYS |

		MSI_ADDR_REDIRECTION_CPU |

		MSI_ADDR_DESTID_CPU(dest);

		MSI_ADDR_DEST_ID_CPU(dest);



	msg->data =

		MSI_DATA_TRIGGER_EDGE |

arch/ia64/kvm/Kconfig

+4 −0
Original line number Diff line number Diff line
@@ -4,6 +4,10 @@ 
config HAVE_KVM

	bool



config HAVE_KVM_IRQCHIP

       bool

       default y



menuconfig VIRTUALIZATION

	bool "Virtualization"

	depends on HAVE_KVM || IA64