Loading arch/arm/boot/dts/qcom/mdmcalifornium-rumi.dts +4 −0 Original line number Diff line number Diff line Loading @@ -49,3 +49,7 @@ &gdsc_pcie { compatible = "regulator-fixed"; }; &qnand_1 { status = "ok"; }; arch/arm/boot/dts/qcom/mdmcalifornium-sim.dts +4 −0 Original line number Diff line number Diff line Loading @@ -25,3 +25,7 @@ &blsp1_uart1 { status = "ok"; }; &qnand_1 { status = "ok"; }; arch/arm/boot/dts/qcom/mdmcalifornium.dtsi +24 −0 Original line number Diff line number Diff line Loading @@ -41,6 +41,7 @@ smd11 = &smdtty_data11; smd21 = &smdtty_data21; smd36 = &smdtty_loopback; qpic_nand1 = &qnand_1; }; cpus { Loading Loading @@ -265,6 +266,29 @@ qcom,num-locks = <8>; }; qnand_1: nand@7980000 { compatible = "qcom,msm-nand"; reg = <0x07980000 0x10000>, <0x07984000 0x1a000>; reg-names = "nand_phys", "bam_phys"; interrupts = <0 247 0>; interrupt-names = "bam_irq"; qcom,msm-bus,name = "qpic_nand"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <91 512 0 0>, /* Voting for max b/w on PNOC bus for now */ <91 512 400000 800000>; clock-names = "core_clk"; clocks = <&clock_gcc clk_qpic_clk>; status = "disabled"; }; qcom,smem@87e80000 { compatible = "qcom,smem"; reg = <0x87e80000 0xc0000>, Loading Loading
arch/arm/boot/dts/qcom/mdmcalifornium-rumi.dts +4 −0 Original line number Diff line number Diff line Loading @@ -49,3 +49,7 @@ &gdsc_pcie { compatible = "regulator-fixed"; }; &qnand_1 { status = "ok"; };
arch/arm/boot/dts/qcom/mdmcalifornium-sim.dts +4 −0 Original line number Diff line number Diff line Loading @@ -25,3 +25,7 @@ &blsp1_uart1 { status = "ok"; }; &qnand_1 { status = "ok"; };
arch/arm/boot/dts/qcom/mdmcalifornium.dtsi +24 −0 Original line number Diff line number Diff line Loading @@ -41,6 +41,7 @@ smd11 = &smdtty_data11; smd21 = &smdtty_data21; smd36 = &smdtty_loopback; qpic_nand1 = &qnand_1; }; cpus { Loading Loading @@ -265,6 +266,29 @@ qcom,num-locks = <8>; }; qnand_1: nand@7980000 { compatible = "qcom,msm-nand"; reg = <0x07980000 0x10000>, <0x07984000 0x1a000>; reg-names = "nand_phys", "bam_phys"; interrupts = <0 247 0>; interrupt-names = "bam_irq"; qcom,msm-bus,name = "qpic_nand"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <91 512 0 0>, /* Voting for max b/w on PNOC bus for now */ <91 512 400000 800000>; clock-names = "core_clk"; clocks = <&clock_gcc clk_qpic_clk>; status = "disabled"; }; qcom,smem@87e80000 { compatible = "qcom,smem"; reg = <0x87e80000 0xc0000>, Loading