Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit d384df20 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ARM: dts: msm: Add support for USB device for msmcobalt"

parents 1d27ac6a 370dcb52

arch/arm/boot/dts/qcom/msmcobalt-rumi.dts

+40 −0
Original line number Diff line number Diff line
@@ -22,3 +22,43 @@ 
	compatible = "qcom,msmcobalt-rumi", "qcom,msmcobalt", "qcom,rumi";

	qcom,board-id = <15 0>;

};



&usb3 {

	qcom,disable-dev-mode-pm;

	dwc3@a800000 {

		maximum-speed = "high-speed";

	};

};



&qusb_phy0 {

	reg = <0x0a928000 0x8000>,

	    <0x0a8f8800 0x400>,

	    <0x0a920000 0x100>;

	reg-names = "qusb_phy_base",

		"qscratch_base",

		"emu_phy_base";

	qcom,emulation;

	qcom,emu-init-seq = <0x7f 0x4

			0x0 0x4

			0x3ff 0x28

			0x1f 0x2c>;

	qcom,qusb-phy-init-seq = <0x19 0x1404

				0x20 0x1414

				0x79 0x1410

				0x00 0x1418

				0x99 0x1404

				0x04 0x1408

				0xd9 0x1404>;

	qcom,phy-pll-reset-seq = <0x80000000 0x7500

				0x0 0x7500

				0x201e0 0x7500

				0x0 0x7500>;

	qcom,emu-dcm-reset-seq = <0x100000 0x20

				0x0 0x20

				0x1e0 0x20

				0x5 0x14>;

};



&ssphy {

	compatible =  "usb-nop-xceiv";

};

arch/arm/boot/dts/qcom/msmcobalt-sim.dts

+8 −0
Original line number Diff line number Diff line
@@ -30,3 +30,11 @@ 
&ufs1 {

	status = "ok";

};



&qusb_phy0 {

	compatible =  "usb-nop-xceiv";

};



&ssphy {

	compatible =  "usb-nop-xceiv";

};

arch/arm/boot/dts/qcom/msmcobalt.dtsi

+97 −0
Original line number Diff line number Diff line
@@ -651,6 +651,103 @@ 
			compatible = "qcom,ufs_variant";

		};

	};



	usb3: ssusb@a800000 {

		compatible = "qcom,dwc-usb3-msm";

		reg = <0x0a800000 0xf8c00>,

		      <0x0c016000 0x400>;

		reg-names = "core_base", "ahb2phy_base";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;



		interrupts = <0 133 0>, <0 180 0>;

		interrupt-names = "hs_phy_irq", "pwr_event_irq";



		USB3_GDSC-supply = <&gdsc_usb30>;

		qcom,msm-bus,name = "usb3";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

					<61 512 0 0>,

					<61 512 240000 960000>;



		qcom,dwc-usb3-msm-tx-fifo-size = <21288>;

		qcom,power-collapse-on-cable-disconnect;

		qcom,por-after-power-collapse;



		clocks = <&clock_gcc clk_gcc_usb30_master_clk>,

			<&clock_gcc clk_gcc_cfg_noc_usb3_axi_clk>,

			<&clock_gcc clk_gcc_aggre1_usb3_axi_clk>,

			<&clock_gcc clk_gcc_usb30_mock_utmi_clk>,

			<&clock_gcc clk_gcc_usb30_sleep_clk>,

			<&clock_gcc clk_cxo_dwc3_clk>;



		clock-names = "core_clk", "iface_clk", "bus_aggr_clk",

				"utmi_clk", "sleep_clk", "xo";



		dwc3@a800000 {

			compatible = "snps,dwc3";

			reg = <0x0a800000 0xcd00>;

			interrupt-parent = <&intc>;

			interrupts = <0 131 0>;

			usb-phy = <&qusb_phy0>, <&ssphy>;

			tx-fifo-resize;

			snps,usb3-u1u2-disable;

			snps,nominal-elastic-buffer;

			snps,hird_thresh = <0x10>;

		};

	 };



	android_usb {

		compatible = "qcom,android-usb";

	};



	qusb_phy0: qusb@c012200 {

		compatible = "qcom,qusb2phy";

		reg = <0x0c012200 0xb0>,

		      <0x0a8f8800 0x400>,

			<0x0078024c 0x4>;

		reg-names = "qusb_phy_base",

			"qscratch_base",

			"tune2_efuse_addr";

		vdd-supply = <&pmcobalt_l1>;

		vdda18-supply = <&pmcobalt_l12>;

		vdda33-supply = <&pmcobalt_l24>;

		qcom,vdd-voltage-level = <0 880000 880000>;

		phy_type= "utmi";



		clocks = <&clock_gcc clk_ln_bb_clk1>,

			 <&clock_gcc clk_gcc_rx1_usb2_clkref_clk>,

			 <&clock_gcc clk_gcc_usb_phy_cfg_ahb2phy_clk>,

			 <&clock_gcc clk_gcc_qusb2phy_prim_reset>;



		clock-names = "ref_clk_src", "ref_clk", "cfg_ahb_clk",

			      "phy_reset";

	};



	ssphy: ssphy@c010000 {

		compatible = "qcom,usb-ssphy-qmp-v2";

		reg = <0x0c010000 0xbf8>,

		      <0x01fcb244 0x4>;

		reg-names = "qmp_phy_base",

			    "vls_clamp_reg";

		vdd-supply = <&pmcobalt_l1>;

		vdda18-supply = <&pmcobalt_l12>;

		qcom,vdd-voltage-level = <0 880000 880000>;

		qcom,vbus-valid-override;



		clocks = <&clock_gcc clk_gcc_usb3_phy_aux_clk>,

			 <&clock_gcc clk_gcc_usb3_phy_pipe_clk>,

			 <&clock_gcc clk_gcc_usb_phy_cfg_ahb2phy_clk>,

			 <&clock_gcc clk_gcc_usb3_phy_reset>,

			 <&clock_gcc clk_gcc_usb3phy_phy_reset>,

			 <&clock_gcc clk_ln_bb_clk1>,

			 <&clock_gcc clk_gcc_usb3_clkref_clk>;



		clock-names = "aux_clk", "pipe_clk", "cfg_ahb_clk", "phy_reset",

			      "phy_phy_reset", "ref_clk_src", "ref_clk";

	};

};



#include "msmcobalt-regulator.dtsi"