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Commit d2ce78dc authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "msm: kgsl: Specify the initial pwrlevel for each speed bin"

parents ed86e7c8 f069eedd

Documentation/devicetree/bindings/gpu/adreno-pwrlevels.txt

+1 −0
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ Properties: 
Properties:

- qcom,speed-bin:		Speed bin identifier for the set - must match

				the value read from the hardware

- qcom,initial-pwrlevel:	GPU wakeup powerlevel



- qcom,gpu-pwrlevel:		A single powerlevel

arch/arm/boot/dts/qcom/msm8996-v3.dtsi

+4 −1
Original line number Diff line number Diff line
@@ -98,7 +98,6 @@ 
	/* Updated chip ID */

	qcom,chipid = <0x05030002>;



	qcom,initial-pwrlevel = <5>;

	qcom,bus-width = <32>;

	qcom,gpu-speed-bin = <0x4130 0xe0000000 29>;
@@ -117,6 +116,8 @@ 


			qcom,speed-bin = <0>;



			qcom,initial-pwrlevel = <5>;



			qcom,gpu-pwrlevel@0 {

				reg = <0>;

				qcom,gpu-freq = <624000000>;
@@ -188,6 +189,8 @@ 


			qcom,speed-bin = <1>;



			qcom,initial-pwrlevel = <3>;



			qcom,gpu-pwrlevel@0 {

				reg = <0>;

				qcom,gpu-freq = <510000000>;

arch/arm/boot/dts/qcom/msm8996pro.dtsi

+4 −2
Original line number Diff line number Diff line
@@ -859,8 +859,6 @@ 
	/* Updated chip ID */

	qcom,chipid = <0x05030004>;



	qcom,initial-pwrlevel = <6>;



	qcom,gpu-speed-bin = <0x413c 0x30000000 28>;



	qcom,gpu-pwrlevel-bins {
@@ -875,6 +873,8 @@ 


			qcom,speed-bin = <0>;



			qcom,initial-pwrlevel = <6>;



			qcom,gpu-pwrlevel@0 {

				reg = <0>;

				qcom,gpu-freq = <652800000>;
@@ -954,6 +954,8 @@ 


			qcom,speed-bin = <1>;



			qcom,initial-pwrlevel = <5>;



			qcom,gpu-pwrlevel@0 {

				reg = <0>;

				qcom,gpu-freq = <624000000>;

drivers/gpu/msm/adreno.c

+32 −14
Original line number Diff line number Diff line
@@ -718,10 +718,28 @@ static int adreno_of_parse_pwrlevels(struct adreno_device *adreno_dev, 
	return 0;

}





static void adreno_of_get_initial_pwrlevel(struct adreno_device *adreno_dev,

		struct device_node *node)

{

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	struct kgsl_pwrctrl *pwr = &device->pwrctrl;

	int init_level = 1;



	of_property_read_u32(node, "qcom,initial-pwrlevel", &init_level);



	if (init_level < 0 || init_level > pwr->num_pwrlevels)

		init_level = 1;



	pwr->active_pwrlevel = init_level;

	pwr->default_pwrlevel = init_level;

}



static int adreno_of_get_legacy_pwrlevels(struct adreno_device *adreno_dev,

		struct device_node *parent)

{

	struct device_node *node;

	int ret;



	node = of_find_node_by_name(parent, "qcom,gpu-pwrlevels");
@@ -730,7 +748,10 @@ static int adreno_of_get_legacy_pwrlevels(struct adreno_device *adreno_dev, 
		return -EINVAL;

	}



	return adreno_of_parse_pwrlevels(adreno_dev, node);

	ret = adreno_of_parse_pwrlevels(adreno_dev, node);

	if (ret == 0)

		adreno_of_get_initial_pwrlevel(adreno_dev, parent);

	return ret;

}



static int adreno_of_get_pwrlevels(struct adreno_device *adreno_dev,
@@ -748,8 +769,15 @@ static int adreno_of_get_pwrlevels(struct adreno_device *adreno_dev, 
		if (of_property_read_u32(child, "qcom,speed-bin", &bin))

			continue;



		if (bin == adreno_dev->speed_bin)

			return adreno_of_parse_pwrlevels(adreno_dev, child);

		if (bin == adreno_dev->speed_bin) {

			int ret;



			ret = adreno_of_parse_pwrlevels(adreno_dev, child);

			if (ret == 0)

				adreno_of_get_initial_pwrlevel(adreno_dev,

								child);

			return ret;

		}

	}



	return -ENODEV;
@@ -775,9 +803,8 @@ static int adreno_of_get_power(struct adreno_device *adreno_dev, 
		struct platform_device *pdev)

{

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	struct kgsl_pwrctrl *pwr = &device->pwrctrl;

	struct device_node *node = pdev->dev.of_node;

	int i, init_level;

	int i;

	unsigned int timeout;



	if (of_property_read_string(node, "label", &pdev->name)) {
@@ -797,15 +824,6 @@ static int adreno_of_get_power(struct adreno_device *adreno_dev, 
	if (adreno_of_get_pwrlevels(adreno_dev, node))

		return -EINVAL;



	if (of_property_read_u32(node, "qcom,initial-pwrlevel", &init_level))

		init_level = 1;



	if (init_level < 0 || init_level > pwr->num_pwrlevels)

		init_level = 1;



	pwr->active_pwrlevel = init_level;

	pwr->default_pwrlevel = init_level;



	/* get pm-qos-active-latency, set it to default if not found */

	if (of_property_read_u32(node, "qcom,pm-qos-active-latency",

		&device->pwrctrl.pm_qos_active_latency))