Loading drivers/clk/msm/clock-rpm-8909.c +6 −1 Original line number Diff line number Diff line /* Copyright (c) 2014, 2017, The Linux Foundation. All rights reserved. /* Copyright (c) 2014, 2017-2018, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -52,6 +52,7 @@ #define BB_CLK2_ID 2 #define BB_CLK3_ID 3 #define RF_CLK2_ID 5 #define RF_CLK1_ID 4 static void __iomem *virt_base; Loading @@ -71,11 +72,13 @@ DEFINE_CLK_RPM_SMD_XO_BUFFER(bb_clk1, bb_clk1_a, BB_CLK1_ID); DEFINE_CLK_RPM_SMD_XO_BUFFER(bb_clk2, bb_clk2_a, BB_CLK2_ID); DEFINE_CLK_RPM_SMD_XO_BUFFER(bb_clk3, bb_clk3_a, BB_CLK3_ID); DEFINE_CLK_RPM_SMD_XO_BUFFER(rf_clk2, rf_clk2_a, RF_CLK2_ID); DEFINE_CLK_RPM_SMD_XO_BUFFER(rf_clk1, rf_clk1_a, RF_CLK1_ID); DEFINE_CLK_RPM_SMD_XO_BUFFER_PINCTRL(bb_clk1_pin, bb_clk1_a_pin, BB_CLK1_ID); DEFINE_CLK_RPM_SMD_XO_BUFFER_PINCTRL(bb_clk2_pin, bb_clk2_a_pin, BB_CLK2_ID); DEFINE_CLK_RPM_SMD_XO_BUFFER_PINCTRL(bb_clk3_pin, bb_clk3_a_pin, BB_CLK3_ID); DEFINE_CLK_RPM_SMD_XO_BUFFER_PINCTRL(rf_clk2_pin, rf_clk2_a_pin, RF_CLK2_ID); DEFINE_CLK_RPM_SMD_XO_BUFFER_PINCTRL(rf_clk1_pin, rf_clk1_a_pin, RF_CLK1_ID); /* Voter clocks */ static DEFINE_CLK_VOTER(pcnoc_msmbus_clk, &pcnoc_clk.c, LONG_MAX); Loading Loading @@ -214,12 +217,14 @@ static struct clk_lookup msm_clocks_rpm_8909_pm660[] = { CLK_LIST(bb_clk1), CLK_LIST(bb_clk2), CLK_LIST(bb_clk3), CLK_LIST(rf_clk1), CLK_LIST(rf_clk2), CLK_LIST(bb_clk1_pin), CLK_LIST(bb_clk2_pin), CLK_LIST(bb_clk3_pin), CLK_LIST(rf_clk2_pin), CLK_LIST(rf_clk1_pin), /* RPM debug Mux*/ CLK_LIST(rpm_debug_mux), Loading Loading
drivers/clk/msm/clock-rpm-8909.c +6 −1 Original line number Diff line number Diff line /* Copyright (c) 2014, 2017, The Linux Foundation. All rights reserved. /* Copyright (c) 2014, 2017-2018, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -52,6 +52,7 @@ #define BB_CLK2_ID 2 #define BB_CLK3_ID 3 #define RF_CLK2_ID 5 #define RF_CLK1_ID 4 static void __iomem *virt_base; Loading @@ -71,11 +72,13 @@ DEFINE_CLK_RPM_SMD_XO_BUFFER(bb_clk1, bb_clk1_a, BB_CLK1_ID); DEFINE_CLK_RPM_SMD_XO_BUFFER(bb_clk2, bb_clk2_a, BB_CLK2_ID); DEFINE_CLK_RPM_SMD_XO_BUFFER(bb_clk3, bb_clk3_a, BB_CLK3_ID); DEFINE_CLK_RPM_SMD_XO_BUFFER(rf_clk2, rf_clk2_a, RF_CLK2_ID); DEFINE_CLK_RPM_SMD_XO_BUFFER(rf_clk1, rf_clk1_a, RF_CLK1_ID); DEFINE_CLK_RPM_SMD_XO_BUFFER_PINCTRL(bb_clk1_pin, bb_clk1_a_pin, BB_CLK1_ID); DEFINE_CLK_RPM_SMD_XO_BUFFER_PINCTRL(bb_clk2_pin, bb_clk2_a_pin, BB_CLK2_ID); DEFINE_CLK_RPM_SMD_XO_BUFFER_PINCTRL(bb_clk3_pin, bb_clk3_a_pin, BB_CLK3_ID); DEFINE_CLK_RPM_SMD_XO_BUFFER_PINCTRL(rf_clk2_pin, rf_clk2_a_pin, RF_CLK2_ID); DEFINE_CLK_RPM_SMD_XO_BUFFER_PINCTRL(rf_clk1_pin, rf_clk1_a_pin, RF_CLK1_ID); /* Voter clocks */ static DEFINE_CLK_VOTER(pcnoc_msmbus_clk, &pcnoc_clk.c, LONG_MAX); Loading Loading @@ -214,12 +217,14 @@ static struct clk_lookup msm_clocks_rpm_8909_pm660[] = { CLK_LIST(bb_clk1), CLK_LIST(bb_clk2), CLK_LIST(bb_clk3), CLK_LIST(rf_clk1), CLK_LIST(rf_clk2), CLK_LIST(bb_clk1_pin), CLK_LIST(bb_clk2_pin), CLK_LIST(bb_clk3_pin), CLK_LIST(rf_clk2_pin), CLK_LIST(rf_clk1_pin), /* RPM debug Mux*/ CLK_LIST(rpm_debug_mux), Loading