Loading arch/blackfin/include/asm/ipipe.h +0 −10 Original line number Diff line number Diff line Loading @@ -124,16 +124,6 @@ static inline int __ipipe_check_tickdev(const char *devname) return 1; } static inline void __ipipe_lock_root(void) { set_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status)); } static inline void __ipipe_unlock_root(void) { clear_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status)); } void __ipipe_enable_pipeline(void); #define __ipipe_hook_critical_ipi(ipd) do { } while (0) Loading arch/blackfin/include/asm/ipipe_base.h +9 −17 Original line number Diff line number Diff line Loading @@ -51,23 +51,15 @@ extern unsigned long __ipipe_root_status; /* Alias to ipipe_root_cpudom_var(status) */ #define __ipipe_stall_root() \ do { \ volatile unsigned long *p = &__ipipe_root_status; \ set_bit(0, p); \ } while (0) #define __ipipe_test_and_stall_root() \ ({ \ volatile unsigned long *p = &__ipipe_root_status; \ test_and_set_bit(0, p); \ }) #define __ipipe_test_root() \ ({ \ const unsigned long *p = &__ipipe_root_status; \ test_bit(0, p); \ }) void __ipipe_stall_root(void); unsigned long __ipipe_test_and_stall_root(void); unsigned long __ipipe_test_root(void); void __ipipe_lock_root(void); void __ipipe_unlock_root(void); #endif /* !__ASSEMBLY__ */ Loading arch/blackfin/kernel/ipipe.c +67 −0 Original line number Diff line number Diff line Loading @@ -335,3 +335,70 @@ void __ipipe_enable_root_irqs_hw(void) __clear_bit(IPIPE_STALL_FLAG, &ipipe_root_cpudom_var(status)); bfin_sti(bfin_irq_flags); } /* * We could use standard atomic bitops in the following root status * manipulation routines, but let's prepare for SMP support in the * same move, preventing CPU migration as required. */ void __ipipe_stall_root(void) { unsigned long *p, flags; local_irq_save_hw(flags); p = &__ipipe_root_status; __set_bit(IPIPE_STALL_FLAG, p); local_irq_restore_hw(flags); } EXPORT_SYMBOL(__ipipe_stall_root); unsigned long __ipipe_test_and_stall_root(void) { unsigned long *p, flags; int x; local_irq_save_hw(flags); p = &__ipipe_root_status; x = __test_and_set_bit(IPIPE_STALL_FLAG, p); local_irq_restore_hw(flags); return x; } EXPORT_SYMBOL(__ipipe_test_and_stall_root); unsigned long __ipipe_test_root(void) { const unsigned long *p; unsigned long flags; int x; local_irq_save_hw_smp(flags); p = &__ipipe_root_status; x = test_bit(IPIPE_STALL_FLAG, p); local_irq_restore_hw_smp(flags); return x; } EXPORT_SYMBOL(__ipipe_test_root); void __ipipe_lock_root(void) { unsigned long *p, flags; local_irq_save_hw(flags); p = &__ipipe_root_status; __set_bit(IPIPE_SYNCDEFER_FLAG, p); local_irq_restore_hw(flags); } EXPORT_SYMBOL(__ipipe_lock_root); void __ipipe_unlock_root(void) { unsigned long *p, flags; local_irq_save_hw(flags); p = &__ipipe_root_status; __clear_bit(IPIPE_SYNCDEFER_FLAG, p); local_irq_restore_hw(flags); } EXPORT_SYMBOL(__ipipe_unlock_root); Loading
arch/blackfin/include/asm/ipipe.h +0 −10 Original line number Diff line number Diff line Loading @@ -124,16 +124,6 @@ static inline int __ipipe_check_tickdev(const char *devname) return 1; } static inline void __ipipe_lock_root(void) { set_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status)); } static inline void __ipipe_unlock_root(void) { clear_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status)); } void __ipipe_enable_pipeline(void); #define __ipipe_hook_critical_ipi(ipd) do { } while (0) Loading
arch/blackfin/include/asm/ipipe_base.h +9 −17 Original line number Diff line number Diff line Loading @@ -51,23 +51,15 @@ extern unsigned long __ipipe_root_status; /* Alias to ipipe_root_cpudom_var(status) */ #define __ipipe_stall_root() \ do { \ volatile unsigned long *p = &__ipipe_root_status; \ set_bit(0, p); \ } while (0) #define __ipipe_test_and_stall_root() \ ({ \ volatile unsigned long *p = &__ipipe_root_status; \ test_and_set_bit(0, p); \ }) #define __ipipe_test_root() \ ({ \ const unsigned long *p = &__ipipe_root_status; \ test_bit(0, p); \ }) void __ipipe_stall_root(void); unsigned long __ipipe_test_and_stall_root(void); unsigned long __ipipe_test_root(void); void __ipipe_lock_root(void); void __ipipe_unlock_root(void); #endif /* !__ASSEMBLY__ */ Loading
arch/blackfin/kernel/ipipe.c +67 −0 Original line number Diff line number Diff line Loading @@ -335,3 +335,70 @@ void __ipipe_enable_root_irqs_hw(void) __clear_bit(IPIPE_STALL_FLAG, &ipipe_root_cpudom_var(status)); bfin_sti(bfin_irq_flags); } /* * We could use standard atomic bitops in the following root status * manipulation routines, but let's prepare for SMP support in the * same move, preventing CPU migration as required. */ void __ipipe_stall_root(void) { unsigned long *p, flags; local_irq_save_hw(flags); p = &__ipipe_root_status; __set_bit(IPIPE_STALL_FLAG, p); local_irq_restore_hw(flags); } EXPORT_SYMBOL(__ipipe_stall_root); unsigned long __ipipe_test_and_stall_root(void) { unsigned long *p, flags; int x; local_irq_save_hw(flags); p = &__ipipe_root_status; x = __test_and_set_bit(IPIPE_STALL_FLAG, p); local_irq_restore_hw(flags); return x; } EXPORT_SYMBOL(__ipipe_test_and_stall_root); unsigned long __ipipe_test_root(void) { const unsigned long *p; unsigned long flags; int x; local_irq_save_hw_smp(flags); p = &__ipipe_root_status; x = test_bit(IPIPE_STALL_FLAG, p); local_irq_restore_hw_smp(flags); return x; } EXPORT_SYMBOL(__ipipe_test_root); void __ipipe_lock_root(void) { unsigned long *p, flags; local_irq_save_hw(flags); p = &__ipipe_root_status; __set_bit(IPIPE_SYNCDEFER_FLAG, p); local_irq_restore_hw(flags); } EXPORT_SYMBOL(__ipipe_lock_root); void __ipipe_unlock_root(void) { unsigned long *p, flags; local_irq_save_hw(flags); p = &__ipipe_root_status; __clear_bit(IPIPE_SYNCDEFER_FLAG, p); local_irq_restore_hw(flags); } EXPORT_SYMBOL(__ipipe_unlock_root);