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Commit d24de495 authored by Philipp Zabel's avatar Philipp Zabel Committed by Shawn Guo
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ARM i.MX53: tve_di clock is not part of the CCM, but of TVE 



Remove the tve_di clock from the CCM clock tree. It will be provided
by the Television Encoder driver, as this clock is an output signal
of the TVE module.

Signed-off-by: default avatarPhilipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent f550e701

Documentation/devicetree/bindings/clock/imx5-clock.txt

+0 −1
Original line number Diff line number Diff line
@@ -38,7 +38,6 @@ clocks and IDs. 
	usb_phy_podf		23

	cpu_podf		24

	di_pred			25

	tve_di			26

	tve_s			27

	uart1_ipg_gate		28

	uart1_per_gate		29

arch/arm/mach-imx/clk-imx51-imx53.c

+1 −2
Original line number Diff line number Diff line
@@ -78,7 +78,7 @@ enum imx5_clks { 
	dummy, ckil, osc, ckih1, ckih2, ahb, ipg, axi_a, axi_b, uart_pred,

	uart_root, esdhc_a_pred, esdhc_b_pred, esdhc_c_s, esdhc_d_s,

	emi_sel, emi_slow_podf, nfc_podf, ecspi_pred, ecspi_podf, usboh3_pred,

	usboh3_podf, usb_phy_pred, usb_phy_podf, cpu_podf, di_pred, tve_di,

	usboh3_podf, usb_phy_pred, usb_phy_podf, cpu_podf, di_pred, tve_di_unused,

	tve_s, uart1_ipg_gate, uart1_per_gate, uart2_ipg_gate,

	uart2_per_gate, uart3_ipg_gate, uart3_per_gate, i2c1_gate, i2c2_gate,

	gpt_ipg_gate, pwm1_ipg_gate, pwm1_hf_gate, pwm2_ipg_gate, pwm2_hf_gate,
@@ -187,7 +187,6 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil, 
				usb_phy_sel_str, ARRAY_SIZE(usb_phy_sel_str));

	clk[cpu_podf] = imx_clk_divider("cpu_podf", "pll1_sw", MXC_CCM_CACRR, 0, 3);

	clk[di_pred] = imx_clk_divider("di_pred", "pll3_sw", MXC_CCM_CDCDR, 6, 3);

	clk[tve_di] = imx_clk_fixed("tve_di", 65000000); /* FIXME */

	clk[iim_gate] = imx_clk_gate2("iim_gate", "ipg", MXC_CCM_CCGR0, 30);

	clk[uart1_ipg_gate] = imx_clk_gate2("uart1_ipg_gate", "ipg", MXC_CCM_CCGR1, 6);

	clk[uart1_per_gate] = imx_clk_gate2("uart1_per_gate", "uart_root", MXC_CCM_CCGR1, 8);