Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit d24cc778 authored by Phani Kumar Uppalapati's avatar Phani Kumar Uppalapati
Browse files

drivers: mfd: Add support for wcd9335 version 2.0 



Add support for wcd9335 version 2.0 and update the
register defaults accordingly based on the version.

Change-Id: I33038c1643b83ecd593891688c0ddf4a556b92ee
Signed-off-by: default avatarPhani Kumar Uppalapati <phaniu@codeaurora.org>
parent 8b477bbf

drivers/mfd/wcd9335-regmap.c

+327 −132

File changed.

Preview size limit exceeded, changes collapsed.

drivers/mfd/wcd9335-tables.c

+11 −0
Original line number Diff line number Diff line
@@ -105,6 +105,8 @@ const u8 wcd9335_page0_reg_readable[WCD9335_PAGE_SIZE] = { 
	[WCD9335_REG(WCD9335_DATA_HUB_DATA_HUB_TX_I2S_SD0_R_CFG)] = 1,

	[WCD9335_REG(WCD9335_DATA_HUB_DATA_HUB_TX_I2S_SD1_L_CFG)] = 1,

	[WCD9335_REG(WCD9335_DATA_HUB_DATA_HUB_TX_I2S_SD1_R_CFG)] = 1,

	[WCD9335_REG(WCD9335_DATA_HUB_NATIVE_FIFO_SYNC)] = 1,

	[WCD9335_REG(WCD9335_DATA_HUB_NATIVE_FIFO_STATUS)] = 1,

	[WCD9335_REG(WCD9335_INTR_CFG)] = 1,

	[WCD9335_REG(WCD9335_INTR_CLR_COMMIT)] = 0,

	[WCD9335_REG(WCD9335_INTR_PIN1_MASK0)] = 1,
@@ -366,10 +368,13 @@ const u8 wcd9335_page2_reg_readable[WCD9335_PAGE_SIZE] = { 
	[WCD9335_REG(WCD9335_CPE_SS_US_EC_MUX_CFG)] = 1,

	[WCD9335_REG(WCD9335_CPE_SS_MAD_CTL)] = 1,

	[WCD9335_REG(WCD9335_CPE_SS_CPAR_CTL)] = 1,

	[WCD9335_REG(WCD9335_CPE_SS_TX_PP_BUF_INT_PERIOD)] = 1,

	[WCD9335_REG(WCD9335_CPE_SS_TX_PP_CFG)] = 1,

	[WCD9335_REG(WCD9335_CPE_SS_DMIC0_CTL)] = 1,

	[WCD9335_REG(WCD9335_CPE_SS_DMIC1_CTL)] = 1,

	[WCD9335_REG(WCD9335_CPE_SS_DMIC2_CTL)] = 1,

	[WCD9335_REG(WCD9335_CPE_SS_DMIC_CFG)] = 1,

	[WCD9335_REG(WCD9335_CPE_SS_SVA_CFG)] = 1,

	[WCD9335_REG(WCD9335_CPE_SS_CPAR_CFG)] = 1,

	[WCD9335_REG(WCD9335_CPE_SS_WDOG_CFG)] = 1,

	[WCD9335_REG(WCD9335_CPE_SS_BACKUP_INT)] = 0,
@@ -710,6 +715,7 @@ const u8 wcd9335_page10_reg_readable[WCD9335_PAGE_SIZE] = { 
	[WCD9335_REG(WCD9335_CDC_TX0_TX_PATH_SEC4)] = 1,

	[WCD9335_REG(WCD9335_CDC_TX0_TX_PATH_SEC5)] = 1,

	[WCD9335_REG(WCD9335_CDC_TX0_TX_PATH_SEC6)] = 1,

	[WCD9335_REG(WCD9335_CDC_TX0_TX_PATH_SEC7)] = 1,

	[WCD9335_REG(WCD9335_CDC_TX1_TX_PATH_CTL)] = 1,

	[WCD9335_REG(WCD9335_CDC_TX1_TX_PATH_CFG0)] = 1,

	[WCD9335_REG(WCD9335_CDC_TX1_TX_PATH_CFG1)] = 1,
@@ -1114,9 +1120,13 @@ const u8 wcd9335_page12_reg_readable[WCD9335_PAGE_SIZE] = { 
	[WCD9335_REG(WCD9335_CDC_VBAT_VBAT_GAIN_UPD_MON)] = 0,

	[WCD9335_REG(WCD9335_CDC_VBAT_VBAT_GAIN_MON_VAL)] = 1,

	[WCD9335_REG(WCD9335_SPLINE_SRC0_CLK_RST_CTL_0)] = 1,

	[WCD9335_REG(WCD9335_SPLINE_SRC0_STATUS)] = 1,

	[WCD9335_REG(WCD9335_SPLINE_SRC1_CLK_RST_CTL_0)] = 1,

	[WCD9335_REG(WCD9335_SPLINE_SRC1_STATUS)] = 1,

	[WCD9335_REG(WCD9335_SPLINE_SRC2_CLK_RST_CTL_0)] = 1,

	[WCD9335_REG(WCD9335_SPLINE_SRC2_STATUS)] = 1,

	[WCD9335_REG(WCD9335_SPLINE_SRC3_CLK_RST_CTL_0)] = 1,

	[WCD9335_REG(WCD9335_SPLINE_SRC3_STATUS)] = 1,

	[WCD9335_REG(WCD9335_CDC_SIDETONE_SRC0_ST_SRC_PATH_CTL)] = 1,

	[WCD9335_REG(WCD9335_CDC_SIDETONE_SRC0_ST_SRC_PATH_CFG1)] = 1,

	[WCD9335_REG(WCD9335_CDC_SIDETONE_SRC1_ST_SRC_PATH_CTL)] = 1,
@@ -1195,6 +1205,7 @@ const u8 wcd9335_page13_reg_readable[WCD9335_PAGE_SIZE] = { 
	[WCD9335_REG(WCD9335_CDC_PROX_DETECT_PROX_TEST_BUFF_MSB)] = 1,

	[WCD9335_REG(WCD9335_CDC_PROX_DETECT_PROX_TEST_BUFF_LSB_RD)] = 1,

	[WCD9335_REG(WCD9335_CDC_PROX_DETECT_PROX_TEST_BUFF_MSB_RD)] = 1,

	[WCD9335_REG(WCD9335_CDC_PROX_DETECT_PROX_CTL_REPEAT_PAT)] = 1,

	[WCD9335_REG(WCD9335_CDC_SIDETONE_IIR0_IIR_PATH_CTL)] = 1,

	[WCD9335_REG(WCD9335_CDC_SIDETONE_IIR0_IIR_GAIN_B1_CTL)] = 1,

	[WCD9335_REG(WCD9335_CDC_SIDETONE_IIR0_IIR_GAIN_B2_CTL)] = 1,

drivers/mfd/wcd9xxx-core.c

+40 −15
Original line number Diff line number Diff line
@@ -950,18 +950,25 @@ static const struct wcd9xxx_codec_type wcd9xxx_codecs[] = { 
		ARRAY_SIZE(tasha_devs), TASHA_NUM_IRQS, -1,

		WCD9XXX_SLIM_SLAVE_ADDR_TYPE_TAIKO, 0x01

	},

	{

		TASHA2P0_MAJOR, cpu_to_le16(0x1), tasha_devs,

		ARRAY_SIZE(tasha_devs), TASHA_NUM_IRQS, 2,

		WCD9XXX_SLIM_SLAVE_ADDR_TYPE_TAIKO, 0x01

	},

};



static void wcd9335_bring_up(struct wcd9xxx *wcd9xxx)

{

	int val;

	int val, byte0;



	val = __wcd9xxx_reg_read(wcd9xxx,

				 WCD9335_CHIP_TIER_CTRL_EFUSE_VAL_OUT0);

	pr_debug("%s: codec version %s 1.0\n", __func__,

		 ((val & 0x80) ? "greater than" : "is"));

	byte0 = __wcd9xxx_reg_read(wcd9xxx,

				   WCD9335_CHIP_TIER_CTRL_CHIP_ID_BYTE0);



	if (val & 0x80) {

	if ((val & 0x80) && (byte0 == 0x0)) {

		dev_info(wcd9xxx->dev, "%s: wcd9335 codec version is v1.1\n",

			 __func__);

		__wcd9xxx_reg_write(wcd9xxx, WCD9335_CODEC_RPM_RST_CTL, 0x01);

		__wcd9xxx_reg_write(wcd9xxx, WCD9335_SIDO_SIDO_CCL_2, 0xB4);

		__wcd9xxx_reg_write(wcd9xxx, WCD9335_SIDO_SIDO_CCL_4, 0x21);
@@ -972,7 +979,20 @@ static void wcd9335_bring_up(struct wcd9xxx *wcd9xxx) 
		__wcd9xxx_reg_write(wcd9xxx,

				    WCD9335_CODEC_RPM_PWR_CDC_DIG_HM_CTL, 0x3);

		__wcd9xxx_reg_write(wcd9xxx, WCD9335_CODEC_RPM_RST_CTL, 0x3);

	} else if (byte0 == 0x1) {

		dev_info(wcd9xxx->dev, "%s: wcd9335 codec version is v2.0\n",

			 __func__);

		__wcd9xxx_reg_write(wcd9xxx, WCD9335_CODEC_RPM_RST_CTL, 0x01);

		__wcd9xxx_reg_write(wcd9xxx,

				    WCD9335_CODEC_RPM_PWR_CDC_DIG_HM_CTL, 0x5);

		__wcd9xxx_reg_write(wcd9xxx,

				    WCD9335_CODEC_RPM_PWR_CDC_DIG_HM_CTL, 0x7);

		__wcd9xxx_reg_write(wcd9xxx,

				    WCD9335_CODEC_RPM_PWR_CDC_DIG_HM_CTL, 0x3);

		__wcd9xxx_reg_write(wcd9xxx, WCD9335_CODEC_RPM_RST_CTL, 0x3);

	} else {

		dev_info(wcd9xxx->dev, "%s: wcd9335 codec version is v1.0\n",

			 __func__);

		__wcd9xxx_reg_write(wcd9xxx, WCD9335_CODEC_RPM_RST_CTL, 0x01);

		__wcd9xxx_reg_write(wcd9xxx, WCD9335_SIDO_SIDO_CCL_2, 0xB4);

		__wcd9xxx_reg_write(wcd9xxx, WCD9335_SIDO_SIDO_CCL_4, 0x21);
@@ -984,16 +1004,8 @@ static void wcd9335_bring_up(struct wcd9xxx *wcd9xxx) 


static void wcd9335_bring_down(struct wcd9xxx *wcd9xxx)

{

	int val;



	val = __wcd9xxx_reg_read(wcd9xxx,

				 WCD9335_CHIP_TIER_CTRL_EFUSE_VAL_OUT0);

	if (val & 0x80)

	__wcd9xxx_reg_write(wcd9xxx,

			WCD9335_CODEC_RPM_PWR_CDC_DIG_HM_CTL, 0x4);

	else

		__wcd9xxx_reg_write(wcd9xxx,

				    WCD9335_CODEC_RPM_PWR_CDC_DIG_HM_CTL, 0x7);

}



static void wcd9xxx_bring_up(struct wcd9xxx *wcd9xxx)
@@ -1373,6 +1385,7 @@ static void wcd9xxx_core_res_update_irq_regs( 
{

	switch (id_major) {

	case TASHA_MAJOR:

	case TASHA2P0_MAJOR:

		core_res->intr_reg[WCD9XXX_INTR_STATUS_BASE] =

					WCD9335_INTR_PIN1_STATUS0;

		core_res->intr_reg[WCD9XXX_INTR_CLEAR_BASE] =
@@ -1408,6 +1421,7 @@ static int wcd9xxx_device_init(struct wcd9xxx *wcd9xxx) 
	u8 version;

	const struct wcd9xxx_codec_type *found;

	struct wcd9xxx_core_resource *core_res = &wcd9xxx->core_res;

	regmap_patch_fptr regmap_apply_patch = NULL;



	mutex_init(&wcd9xxx->io_lock);

	mutex_init(&wcd9xxx->xfer_lock);
@@ -1434,7 +1448,8 @@ static int wcd9xxx_device_init(struct wcd9xxx *wcd9xxx) 
	} else if (wcd9xxx->codec_type->id_major == TOMTOM_MAJOR) {

		core_res->intr_table = intr_tbl_v3;

		core_res->intr_table_size = ARRAY_SIZE(intr_tbl_v3);

	} else if (wcd9xxx->codec_type->id_major == TASHA_MAJOR) {

	} else if ((wcd9xxx->codec_type->id_major == TASHA_MAJOR) ||

		  (wcd9xxx->codec_type->id_major == TASHA2P0_MAJOR)) {

		core_res->intr_table = intr_tbl_v4;

		core_res->intr_table_size = ARRAY_SIZE(intr_tbl_v4);

	} else {
@@ -1458,6 +1473,16 @@ static int wcd9xxx_device_init(struct wcd9xxx *wcd9xxx) 
		ret = wcd9xxx_regmap_init_cache(wcd9xxx);

		if (ret)

			goto err_irq;



		regmap_apply_patch = wcd9xxx_get_regmap_reg_patch(

							wcd9xxx->type);

		if (regmap_apply_patch) {

			ret = regmap_apply_patch(wcd9xxx->regmap,

					   wcd9xxx->version);

			if (ret)

				dev_err(wcd9xxx->dev,

					"Failed to register patch: %d\n", ret);

		}

	}



	ret = mfd_add_devices(wcd9xxx->dev, -1, found->dev, found->size,

drivers/mfd/wcd9xxx-regmap.h

+22 −0
Original line number Diff line number Diff line
@@ -17,8 +17,12 @@ 
#include <linux/regmap.h>

#include <linux/mfd/wcd9xxx/core.h>



typedef int (*regmap_patch_fptr)(struct regmap *, int);



#ifdef CONFIG_WCD9335_CODEC

extern struct regmap_config wcd9335_regmap_config;

extern int wcd9335_regmap_register_patch(struct regmap *regmap,

					 int version);

#endif



#ifdef CONFIG_WCD9330_CODEC
@@ -48,4 +52,22 @@ static inline struct regmap_config *wcd9xxx_get_regmap_config(int type) 
	return regmap_config;

}



static inline regmap_patch_fptr wcd9xxx_get_regmap_reg_patch(int type)

{

	regmap_patch_fptr apply_patch;



	switch (type) {

#ifdef CONFIG_WCD9335_CODEC

	case WCD9335:

		apply_patch = wcd9335_regmap_register_patch;

		break;

#endif

	default:

		apply_patch = NULL;

		break;

	}



	return apply_patch;

}



#endif

include/linux/mfd/wcd9335/registers.h

+15 −2
Original line number Diff line number Diff line
@@ -120,6 +120,8 @@ enum { 
#define WCD9335_DATA_HUB_DATA_HUB_TX_I2S_SD0_R_CFG       0x0072

#define WCD9335_DATA_HUB_DATA_HUB_TX_I2S_SD1_L_CFG       0x0073

#define WCD9335_DATA_HUB_DATA_HUB_TX_I2S_SD1_R_CFG       0x0074

#define WCD9335_DATA_HUB_NATIVE_FIFO_SYNC                0x0075

#define WCD9335_DATA_HUB_NATIVE_FIFO_STATUS              0x007D

#define WCD9335_INTR_CFG                                 0x0081

#define WCD9335_INTR_CLR_COMMIT                          0x0082

#define WCD9335_INTR_PIN1_MASK0                          0x0089
@@ -379,10 +381,13 @@ enum { 
#define WCD9335_CPE_SS_US_EC_MUX_CFG                     0x025e

#define WCD9335_CPE_SS_MAD_CTL                           0x025f

#define WCD9335_CPE_SS_CPAR_CTL                          0x0260

#define WCD9335_CPE_SS_TX_PP_BUF_INT_PERIOD              0x0261

#define WCD9335_CPE_SS_TX_PP_CFG                         0x0262

#define WCD9335_CPE_SS_DMIC0_CTL                         0x0263

#define WCD9335_CPE_SS_DMIC1_CTL                         0x0264

#define WCD9335_CPE_SS_DMIC2_CTL                         0x0265

#define WCD9335_CPE_SS_DMIC_CFG                          0x0266

#define WCD9335_CPE_SS_SVA_CFG                           0x0267

#define WCD9335_CPE_SS_CPAR_CFG                          0x0271

#define WCD9335_CPE_SS_WDOG_CFG                          0x0272

#define WCD9335_CPE_SS_BACKUP_INT                        0x0273
@@ -510,7 +515,8 @@ enum { 
#define WCD9335_MBHC_PLUG_DETECT_CTL                     0x0658

#define WCD9335_MBHC_ZDET_ANA_CTL                        0x0659

#define WCD9335_MBHC_ZDET_RAMP_CTL                       0x065a

#define WCD9335_MBHC_FSM_DEBUG                           0x065b

#define WCD9335_MBHC_FSM_DEBUG                           0x065b /* v1.x */

#define WCD9335_MBHC_FSM_STATUS                          0x065b /* v2.0 */

#define WCD9335_MBHC_TEST_CTL                            0x065c

#define WCD9335_VBADC_SUBBLOCK_EN                        0x065d

#define WCD9335_VBADC_IBIAS_FE                           0x065e
@@ -596,7 +602,8 @@ enum { 
#define WCD9335_FLYBACK_VNEG_DAC_CTRL_1                  0x06ae

#define WCD9335_FLYBACK_VNEG_DAC_CTRL_2                  0x06af

#define WCD9335_FLYBACK_VNEG_DAC_CTRL_3                  0x06b0

#define WCD9335_FLYBACK_VNEG_DAC_CTRL_4                  0x06b1

#define WCD9335_FLYBACK_VNEG_DAC_CTRL_4                  0x06b1 /* v1.x */

#define WCD9335_FLYBACK_CTRL_1                           0x06b1 /* v2.0 */

#define WCD9335_FLYBACK_TEST_CTL                         0x06b2

#define WCD9335_RX_AUX_SW_CTL                            0x06b3

#define WCD9335_RX_PA_AUX_IN_CONN                        0x06b4
@@ -721,6 +728,7 @@ enum { 
#define WCD9335_CDC_TX0_TX_PATH_SEC4                     0x0a3b

#define WCD9335_CDC_TX0_TX_PATH_SEC5                     0x0a3c

#define WCD9335_CDC_TX0_TX_PATH_SEC6                     0x0a3d

#define WCD9335_CDC_TX0_TX_PATH_SEC7                     0x0a3e

#define WCD9335_CDC_TX1_TX_PATH_CTL                      0x0a41

#define WCD9335_CDC_TX1_TX_PATH_CFG0                     0x0a42

#define WCD9335_CDC_TX1_TX_PATH_CFG1                     0x0a43
@@ -1123,9 +1131,13 @@ enum { 
#define WCD9335_CDC_VBAT_VBAT_GAIN_UPD_MON               0x0c50

#define WCD9335_CDC_VBAT_VBAT_GAIN_MON_VAL               0x0c51

#define WCD9335_SPLINE_SRC0_CLK_RST_CTL_0                0x0c55

#define WCD9335_SPLINE_SRC0_STATUS                       0x0c56

#define WCD9335_SPLINE_SRC1_CLK_RST_CTL_0                0x0c6d

#define WCD9335_SPLINE_SRC1_STATUS                       0x0c6e

#define WCD9335_SPLINE_SRC2_CLK_RST_CTL_0                0x0c85

#define WCD9335_SPLINE_SRC2_STATUS                       0x0c86

#define WCD9335_SPLINE_SRC3_CLK_RST_CTL_0                0x0c9d

#define WCD9335_SPLINE_SRC3_STATUS                       0x0c9e

#define WCD9335_CDC_SIDETONE_SRC0_ST_SRC_PATH_CTL        0x0cb5

#define WCD9335_CDC_SIDETONE_SRC0_ST_SRC_PATH_CFG1       0x0cb6

#define WCD9335_CDC_SIDETONE_SRC1_ST_SRC_PATH_CTL        0x0cb9
@@ -1203,6 +1215,7 @@ enum { 
#define WCD9335_CDC_PROX_DETECT_PROX_TEST_BUFF_MSB       0x0d51

#define WCD9335_CDC_PROX_DETECT_PROX_TEST_BUFF_LSB_RD    0x0d52

#define WCD9335_CDC_PROX_DETECT_PROX_TEST_BUFF_MSB_RD    0x0d53

#define WCD9335_CDC_PROX_DETECT_PROX_CTL_REPEAT_PAT      0x0d54

#define WCD9335_CDC_SIDETONE_IIR0_IIR_PATH_CTL           0x0d55

#define WCD9335_CDC_SIDETONE_IIR0_IIR_GAIN_B1_CTL        0x0d56

#define WCD9335_CDC_SIDETONE_IIR0_IIR_GAIN_B2_CTL        0x0d57