Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit d204b2c5 authored Jun 21, 2011 by Lei Wen Committed by Eric Miao Jul 06, 2011

ARM: pxa910: correct nand pmu setting



The original pair of <0x01db, 208000000> is invalid.
Correct to the valid value.

Signed-off-by: Lei Wen <leiwen@marvell.com>
Cc: stable@kernel.org
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>

parent beb0c9b0

arch/arm/mach-mmp/pxa910.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -110,7 +110,7 @@ static APBC_CLK(pwm2, PXA910_PWM2, 1, 13000000);
		static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000);
		static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000);

		static APMU_CLK(nand, NAND, 0x01db, 208000000);
		static APMU_CLK(nand, NAND, 0x19b, 156000000);
		static APMU_CLK(u2o, USB, 0x1b, 480000000);

		/* device and clock bindings */