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Commit d1b054da authored by Yu Zhao's avatar Yu Zhao Committed by Jesse Barnes
Browse files

PCI: initialize and release SR-IOV capability 



If a device has the SR-IOV capability, initialize it (set the ARI
Capable Hierarchy in the lowest numbered PF if necessary; calculate
the System Page Size for the VF MMIO, probe the VF Offset, Stride
and BARs). A lock for the VF bus allocation is also initialized if
a PF is the lowest numbered PF.

Reviewed-by: default avatarMatthew Wilcox <willy@linux.intel.com>
Signed-off-by: default avatarYu Zhao <yu.zhao@intel.com>
Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
parent 8293b0f6

drivers/pci/Kconfig

+10 −0
Original line number Diff line number Diff line
@@ -59,3 +59,13 @@ config HT_IRQ 
	   This allows native hypertransport devices to use interrupts.



	   If unsure say Y.



config PCI_IOV

	bool "PCI IOV support"

	depends on PCI

	help

	  I/O Virtualization is a PCI feature supported by some devices

	  which allows them to create virtual devices which share their

	  physical resources.



	  If unsure, say N.

drivers/pci/Makefile

+2 −0
Original line number Diff line number Diff line
@@ -29,6 +29,8 @@ obj-$(CONFIG_DMAR) += dmar.o iova.o intel-iommu.o 


obj-$(CONFIG_INTR_REMAP) += dmar.o intr_remapping.o



obj-$(CONFIG_PCI_IOV) += iov.o



#

# Some architectures use the generic PCI setup functions

#

drivers/pci/iov.c

0 → 100644
+182 −0
Original line number Diff line number Diff line 
/*

 * drivers/pci/iov.c

 *

 * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>

 *

 * PCI Express I/O Virtualization (IOV) support.

 *   Single Root IOV 1.0

 */



#include <linux/pci.h>

#include <linux/mutex.h>

#include <linux/string.h>

#include <linux/delay.h>

#include "pci.h"





static int sriov_init(struct pci_dev *dev, int pos)

{

	int i;

	int rc;

	int nres;

	u32 pgsz;

	u16 ctrl, total, offset, stride;

	struct pci_sriov *iov;

	struct resource *res;

	struct pci_dev *pdev;



	if (dev->pcie_type != PCI_EXP_TYPE_RC_END &&

	    dev->pcie_type != PCI_EXP_TYPE_ENDPOINT)

		return -ENODEV;



	pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);

	if (ctrl & PCI_SRIOV_CTRL_VFE) {

		pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);

		ssleep(1);

	}



	pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total);

	if (!total)

		return 0;



	ctrl = 0;

	list_for_each_entry(pdev, &dev->bus->devices, bus_list)

		if (pdev->is_physfn)

			goto found;



	pdev = NULL;

	if (pci_ari_enabled(dev->bus))

		ctrl |= PCI_SRIOV_CTRL_ARI;



found:

	pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);

	pci_write_config_word(dev, pos + PCI_SRIOV_NUM_VF, total);

	pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);

	pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);

	if (!offset || (total > 1 && !stride))

		return -EIO;



	pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz);

	i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0;

	pgsz &= ~((1 << i) - 1);

	if (!pgsz)

		return -EIO;



	pgsz &= ~(pgsz - 1);

	pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);



	nres = 0;

	for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {

		res = dev->resource + PCI_IOV_RESOURCES + i;

		i += __pci_read_base(dev, pci_bar_unknown, res,

				     pos + PCI_SRIOV_BAR + i * 4);

		if (!res->flags)

			continue;

		if (resource_size(res) & (PAGE_SIZE - 1)) {

			rc = -EIO;

			goto failed;

		}

		res->end = res->start + resource_size(res) * total - 1;

		nres++;

	}



	iov = kzalloc(sizeof(*iov), GFP_KERNEL);

	if (!iov) {

		rc = -ENOMEM;

		goto failed;

	}



	iov->pos = pos;

	iov->nres = nres;

	iov->ctrl = ctrl;

	iov->total = total;

	iov->offset = offset;

	iov->stride = stride;

	iov->pgsz = pgsz;

	iov->self = dev;

	pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);

	pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);



	if (pdev)

		iov->dev = pci_dev_get(pdev);

	else {

		iov->dev = dev;

		mutex_init(&iov->lock);

	}



	dev->sriov = iov;

	dev->is_physfn = 1;



	return 0;



failed:

	for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {

		res = dev->resource + PCI_IOV_RESOURCES + i;

		res->flags = 0;

	}



	return rc;

}



static void sriov_release(struct pci_dev *dev)

{

	if (dev == dev->sriov->dev)

		mutex_destroy(&dev->sriov->lock);

	else

		pci_dev_put(dev->sriov->dev);



	kfree(dev->sriov);

	dev->sriov = NULL;

}



/**

 * pci_iov_init - initialize the IOV capability

 * @dev: the PCI device

 *

 * Returns 0 on success, or negative on failure.

 */

int pci_iov_init(struct pci_dev *dev)

{

	int pos;



	if (!dev->is_pcie)

		return -ENODEV;



	pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);

	if (pos)

		return sriov_init(dev, pos);



	return -ENODEV;

}



/**

 * pci_iov_release - release resources used by the IOV capability

 * @dev: the PCI device

 */

void pci_iov_release(struct pci_dev *dev)

{

	if (dev->is_physfn)

		sriov_release(dev);

}



/**

 * pci_iov_resource_bar - get position of the SR-IOV BAR

 * @dev: the PCI device

 * @resno: the resource number

 * @type: the BAR type to be filled in

 *

 * Returns position of the BAR encapsulated in the SR-IOV capability.

 */

int pci_iov_resource_bar(struct pci_dev *dev, int resno,

			 enum pci_bar_type *type)

{

	if (resno < PCI_IOV_RESOURCES || resno > PCI_IOV_RESOURCE_END)

		return 0;



	BUG_ON(!dev->is_physfn);



	*type = pci_bar_unknown;



	return dev->sriov->pos + PCI_SRIOV_BAR +

		4 * (resno - PCI_IOV_RESOURCES);

}

drivers/pci/pci.c

+7 −0
Original line number Diff line number Diff line
@@ -2360,12 +2360,19 @@ int pci_select_bars(struct pci_dev *dev, unsigned long flags) 
 */

int pci_resource_bar(struct pci_dev *dev, int resno, enum pci_bar_type *type)

{

	int reg;



	if (resno < PCI_ROM_RESOURCE) {

		*type = pci_bar_unknown;

		return PCI_BASE_ADDRESS_0 + 4 * resno;

	} else if (resno == PCI_ROM_RESOURCE) {

		*type = pci_bar_mem32;

		return dev->rom_base_reg;

	} else if (resno < PCI_BRIDGE_RESOURCES) {

		/* device specific resource */

		reg = pci_iov_resource_bar(dev, resno, type);

		if (reg)

			return reg;

	}



	dev_err(&dev->dev, "BAR: invalid resource #%d\n", resno);

drivers/pci/pci.h

+37 −0
Original line number Diff line number Diff line
@@ -201,4 +201,41 @@ resource_size_t pci_specified_resource_alignment(struct pci_dev *dev); 
extern void pci_disable_bridge_window(struct pci_dev *dev);

#endif



/* Single Root I/O Virtualization */

struct pci_sriov {

	int pos;		/* capability position */

	int nres;		/* number of resources */

	u32 cap;		/* SR-IOV Capabilities */

	u16 ctrl;		/* SR-IOV Control */

	u16 total;		/* total VFs associated with the PF */

	u16 offset;		/* first VF Routing ID offset */

	u16 stride;		/* following VF stride */

	u32 pgsz;		/* page size for BAR alignment */

	u8 link;		/* Function Dependency Link */

	struct pci_dev *dev;	/* lowest numbered PF */

	struct pci_dev *self;	/* this PF */

	struct mutex lock;	/* lock for VF bus */

};



#ifdef CONFIG_PCI_IOV

extern int pci_iov_init(struct pci_dev *dev);

extern void pci_iov_release(struct pci_dev *dev);

extern int pci_iov_resource_bar(struct pci_dev *dev, int resno,

				enum pci_bar_type *type);

#else

static inline int pci_iov_init(struct pci_dev *dev)

{

	return -ENODEV;

}

static inline void pci_iov_release(struct pci_dev *dev)



{

}

static inline int pci_iov_resource_bar(struct pci_dev *dev, int resno,

				       enum pci_bar_type *type)

{

	return 0;

}

#endif /* CONFIG_PCI_IOV */



#endif /* DRIVERS_PCI_H */