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Commit cf21405f authored by Paul Walmsley's avatar Paul Walmsley
Browse files

OMAP2/3: PRM: add module hard reset support 



This patch adds hard-reset support for processor modules (e.g., DSP, IVA)
on OMAP2/3 platforms.  It's based on the OMAP4 hard-reset support that Benoît
developed in the previous patch.

This patch is a collaboration between Benoît Cousson <b-cousson@ti.com>
and Paul Walmsley <paul@pwsan.com>.

Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
parent 0be1621a

arch/arm/mach-omap2/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -5,7 +5,7 @@ 
# Common support

obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o pm.o



omap-2-3-common				= irq.o sdrc.o

omap-2-3-common				= irq.o sdrc.o prm2xxx_3xxx.o

hwmod-common				= omap_hwmod.o \

					  omap_hwmod_common_data.o

prcm-common				= prcm.o powerdomain.o

arch/arm/mach-omap2/prm.h

+5 −0
Original line number Diff line number Diff line
@@ -246,6 +246,11 @@ static inline u32 prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) 
	return prm_rmw_mod_reg_bits(bits, 0x0, module, idx);

}



/* These omap2_ PRM functions apply to both OMAP2 and 3 */

int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift);

int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift);

int omap2_prm_deassert_hardreset(s16 prm_mod, u8 shift);



int omap4_prm_is_hardreset_asserted(void __iomem *rstctrl_reg, u8 shift);

int omap4_prm_assert_hardreset(void __iomem *rstctrl_reg, u8 shift);

int omap4_prm_deassert_hardreset(void __iomem *rstctrl_reg, u8 shift);

arch/arm/mach-omap2/prm2xxx_3xxx.c

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+110 −0
Original line number Diff line number Diff line 
/*

 * OMAP2/3 PRM module functions

 *

 * Copyright (C) 2010 Texas Instruments, Inc.

 * Copyright (C) 2010 Nokia Corporation

 * Benoît Cousson

 * Paul Walmsley

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */



#include <linux/kernel.h>

#include <linux/delay.h>

#include <linux/errno.h>

#include <linux/err.h>



#include <plat/common.h>

#include <plat/cpu.h>

#include <plat/prcm.h>



#include "prm.h"

#include "prm-regbits-24xx.h"

#include "prm-regbits-34xx.h"



/**

 * omap2_prm_is_hardreset_asserted - read the HW reset line state of

 * submodules contained in the hwmod module

 * @prm_mod: PRM submodule base (e.g. CORE_MOD)

 * @shift: register bit shift corresponding to the reset line to check

 *

 * Returns 1 if the (sub)module hardreset line is currently asserted,

 * 0 if the (sub)module hardreset line is not currently asserted, or

 * -EINVAL if called while running on a non-OMAP2/3 chip.

 */

int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift)

{

	if (!(cpu_is_omap24xx() || cpu_is_omap34xx()))

		return -EINVAL;



	return prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTCTRL,

				       (1 << shift));

}



/**

 * omap2_prm_assert_hardreset - assert the HW reset line of a submodule

 * @prm_mod: PRM submodule base (e.g. CORE_MOD)

 * @shift: register bit shift corresponding to the reset line to assert

 *

 * Some IPs like dsp or iva contain processors that require an HW

 * reset line to be asserted / deasserted in order to fully enable the

 * IP.  These modules may have multiple hard-reset lines that reset

 * different 'submodules' inside the IP block.  This function will

 * place the submodule into reset.  Returns 0 upon success or -EINVAL

 * upon an argument error.

 */

int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift)

{

	u32 mask;



	if (!(cpu_is_omap24xx() || cpu_is_omap34xx()))

		return -EINVAL;



	mask = 1 << shift;

	prm_rmw_mod_reg_bits(mask, mask, prm_mod, OMAP2_RM_RSTCTRL);



	return 0;

}



/**

 * omap2_prm_deassert_hardreset - deassert a submodule hardreset line and wait

 * @prm_mod: PRM submodule base (e.g. CORE_MOD)

 * @shift: register bit shift corresponding to the reset line to deassert

 *

 * Some IPs like dsp or iva contain processors that require an HW

 * reset line to be asserted / deasserted in order to fully enable the

 * IP.  These modules may have multiple hard-reset lines that reset

 * different 'submodules' inside the IP block.  This function will

 * take the submodule out of reset and wait until the PRCM indicates

 * that the reset has completed before returning.  Returns 0 upon success or

 * -EINVAL upon an argument error, -EEXIST if the submodule was already out

 * of reset, or -EBUSY if the submodule did not exit reset promptly.

 */

int omap2_prm_deassert_hardreset(s16 prm_mod, u8 shift)

{

	u32 mask;

	int c;



	if (!(cpu_is_omap24xx() || cpu_is_omap34xx()))

		return -EINVAL;



	mask = 1 << shift;



	/* Check the current status to avoid de-asserting the line twice */

	if (prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTCTRL, mask) == 0)

		return -EEXIST;



	/* Clear the reset status by writing 1 to the status bit */

	prm_rmw_mod_reg_bits(0xffffffff, mask, prm_mod, OMAP2_RM_RSTST);

	/* de-assert the reset control line */

	prm_rmw_mod_reg_bits(mask, 0, prm_mod, OMAP2_RM_RSTCTRL);

	/* wait the status to be set */

	omap_test_timeout(prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTST,

						  mask),

			  MAX_MODULE_HARDRESET_WAIT, c);



	return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0;

}