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Commit cf0721fb authored by Manu Gautam's avatar Manu Gautam
Browse files

usb: bam: Define usb_bam as child of USB controller device 



As usb_bam driver now supports separate DT nodes for each
core, define usb-bam DT node under its USB core.
This allows usb_bam device to directly access its parent
device and remove msm_bam_set_usb_dev API. Having usb_bam
as child will allow it to maintain power management using
its own device instead of invoking PM calls on parent
directly.

Change-Id: I5ec28be10005b364159672aaa00544584928da1e
Signed-off-by: default avatarManu Gautam <mgautam@codeaurora.org>
parent 4c6aa4e0

arch/arm/boot/dts/qcom/mdm9640.dtsi

+111 −111
Original line number Diff line number Diff line
@@ -916,63 +916,6 @@ 
			snps,bus-suspend-enable;

			snps,usb3-u1u2-disable;

		};

	};



	android_usb@86000c8 {

		reg = <0x086000c8 0xc8>;

		compatible = "qcom,android-usb";

		qcom,pm-qos-latency = <101 2001 30001>;

	};



	qusb_phy: qusb@79000 {

		compatible = "qcom,qusb2phy";

		reg = <0x00079000 0x180>,

		      <0x08af8800 0x400>;

		reg-names = "qusb_phy_base",

			    "qscratch_base";

		vdd-supply = <&pmd9635_l4>;

		vdda18-supply = <&pmd9635_l8>;

		vdda33-supply = <&pmd9635_l10>;

		qcom,vdd-voltage-level = <0 1000000 1000000>;

		qcom,qusb-tune = <0xa06393d5>;

		phy_type = "utmi";



		clocks = <&clock_gcc clk_ln_bb_clk>,

			 <&clock_gcc clk_gcc_usb_phy_cfg_ahb_clk>,

			 <&clock_gcc clk_gcc_qusb2a_phy_reset>;



		clock-names = "ref_clk", "cfg_ahb_clk", "phy_reset";

	};



	ssphy: ssphy@78000 {

		compatible = "qcom,usb-ssphy-qmp";

		reg = <0x00078000 0x45c>,

		      <0x0007e000 0x400>;

		reg-names = "qmp_phy_base",

			    "qmp_ahb2phy_base";

		vdd-supply = <&pmd9635_l4>;

		vdda18-supply = <&pmd9635_l8>;

		qcom,vdd-voltage-level = <0 1000000 1000000>;

		qcom,vbus-valid-override;

		qcom,ext-vbus-id;

		qcom,override-pll-calibration;



		clocks = <&clock_gcc clk_gcc_usb3_aux_clk>,

			 <&clock_gcc clk_gcc_usb3_pipe_clk>,

			 <&clock_gcc clk_gcc_usb_phy_cfg_ahb_clk>,

			 <&clock_gcc clk_gcc_usb3_phy_reset>,

			 <&clock_gcc clk_gcc_usb3phy_phy_reset>,

			 <&clock_gcc clk_usb_ss_ldo>;



		clock-names = "aux_clk", "pipe_clk", "cfg_ahb_clk",

                              "phy_reset", "phy_phy_reset", "ldo_clk";

	};



	dbm_1p5: dbm@8af8000 {

		compatible = "qcom,usb-dbm-1p5";

		reg = <0x08af8000 0x400>;

		qcom,reset-ep-after-lpm-resume;

	};



		qcom,usbbam@8b04000 {

			compatible = "qcom,usb-bam-msm";
@@ -1084,6 +1027,63 @@ 
				qcom,descriptor-fifo-size = <0x2000>;

			};

		};

	};



	android_usb@86000c8 {

		reg = <0x086000c8 0xc8>;

		compatible = "qcom,android-usb";

		qcom,pm-qos-latency = <101 2001 30001>;

	};



	qusb_phy: qusb@79000 {

		compatible = "qcom,qusb2phy";

		reg = <0x00079000 0x180>,

		      <0x08af8800 0x400>;

		reg-names = "qusb_phy_base",

			    "qscratch_base";

		vdd-supply = <&pmd9635_l4>;

		vdda18-supply = <&pmd9635_l8>;

		vdda33-supply = <&pmd9635_l10>;

		qcom,vdd-voltage-level = <0 1000000 1000000>;

		qcom,qusb-tune = <0xa06393d5>;

		phy_type = "utmi";



		clocks = <&clock_gcc clk_ln_bb_clk>,

			 <&clock_gcc clk_gcc_usb_phy_cfg_ahb_clk>,

			 <&clock_gcc clk_gcc_qusb2a_phy_reset>;



		clock-names = "ref_clk", "cfg_ahb_clk", "phy_reset";

	};



	ssphy: ssphy@78000 {

		compatible = "qcom,usb-ssphy-qmp";

		reg = <0x00078000 0x45c>,

		      <0x0007e000 0x400>;

		reg-names = "qmp_phy_base",

			    "qmp_ahb2phy_base";

		vdd-supply = <&pmd9635_l4>;

		vdda18-supply = <&pmd9635_l8>;

		qcom,vdd-voltage-level = <0 1000000 1000000>;

		qcom,vbus-valid-override;

		qcom,ext-vbus-id;

		qcom,override-pll-calibration;



		clocks = <&clock_gcc clk_gcc_usb3_aux_clk>,

			 <&clock_gcc clk_gcc_usb3_pipe_clk>,

			 <&clock_gcc clk_gcc_usb_phy_cfg_ahb_clk>,

			 <&clock_gcc clk_gcc_usb3_phy_reset>,

			 <&clock_gcc clk_gcc_usb3phy_phy_reset>,

			 <&clock_gcc clk_usb_ss_ldo>;



		clock-names = "aux_clk", "pipe_clk", "cfg_ahb_clk",

                              "phy_reset", "phy_phy_reset", "ldo_clk";

	};



	dbm_1p5: dbm@8af8000 {

		compatible = "qcom,usb-dbm-1p5";

		reg = <0x08af8000 0x400>;

		qcom,reset-ep-after-lpm-resume;

	};



	tsens: tsens@4a8000 {

		compatible = "qcom,mdm9640-tsens";

arch/arm/boot/dts/qcom/msm8952.dtsi

+66 −62
Original line number Diff line number Diff line
@@ -946,9 +946,62 @@ 
		qcom,has-pronto-hw;

	};



	usb_otg: usb@78db000 {

		compatible = "qcom,hsusb-otg";

		reg = <0x78db000 0x400>, <0x6c000 0x200>;

		reg-names = "core", "phy_csr";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;



		interrupts = <0 134 0>,<0 140 0>;

		interrupt-names = "core_irq", "async_irq";



		hsusb_vdd_dig-supply = <&pm8950_l2>;

		HSUSB_1p8-supply = <&pm8950_l7>;

		HSUSB_3p3-supply = <&pm8950_l13>;

		vbus_otg-supply = <&smbcharger_charger_otg>;

		qcom,vdd-voltage-level = <0 1200000 1200000>;



		qcom,hsusb-otg-phy-type = <3>; /* SNPS Femto PHY */

		qcom,hsusb-otg-mode = <3>; /* OTG mode */

		qcom,hsusb-otg-otg-control = <2>; /* PMIC */

		qcom,dp-manual-pullup;

		qcom,hsusb-otg-disable-reset;

		qcom,hsusb-otg-mpm-dpsehv-int = <49>;

		qcom,hsusb-otg-mpm-dmsehv-int = <58>;

		qcom,phy-dvdd-always-on;

		qcom,boost-sysclk-with-streaming;

		qcom,axi-prefetch-enable;



		qcom,msm-bus,name = "usb2";

		qcom,msm-bus,num-cases = <3>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

				<87 512 0 0>,

				<87 512 80000 0>,

				<87 512 6000  6000>;

		clocks = <&clock_gcc clk_gcc_usb_hs_ahb_clk>,

			 <&clock_gcc clk_gcc_usb_hs_system_clk>,

			 <&clock_gcc clk_gcc_usb2a_phy_sleep_clk>,

			 <&clock_gcc clk_bimc_usb_a_clk>,

			 <&clock_gcc clk_snoc_usb_a_clk>,

			 <&clock_gcc clk_pnoc_usb_a_clk>,

			 <&clock_gcc clk_gcc_qusb2_phy_clk>,

			 <&clock_gcc clk_gcc_usb2_hs_phy_only_clk>,

			 <&clock_gcc clk_gcc_usb_hs_phy_cfg_ahb_clk>,

			 <&clock_gcc clk_xo_otg_clk>;

		clock-names = "iface_clk", "core_clk", "sleep_clk",

				"bimc_clk", "snoc_clk", "pcnoc_clk",

				"phy_reset_clk", "phy_por_clk", "phy_csr_clk",

				"xo";

		qcom,bus-clk-rate = <350400000 200000000 100000000>;

		qcom,max-nominal-sysclk-rate = <133330000>;



		qcom,usbbam@78c4000 {

			compatible = "qcom,usb-bam-msm";

			reg = <0x78c4000 0x17000>;

			interrupt-parent = <&intc>;

			interrupts = <0 135 0>;



			qcom,bam-type = <1>;
@@ -995,7 +1048,7 @@ 
				qcom,descriptor-fifo-size = <0x200>;

			};



		/* USB BAM pipe (consumer) configuration for accelerated DPL */

			/* USB BAM pipe (consumer) config for accelerated DPL */

			qcom,pipe3 {

				label = "hsusb-dpl-ipa-in-1";

				qcom,usb-bam-mem-type = <1>;
@@ -1007,55 +1060,6 @@ 
				qcom,descriptor-fifo-size = <0x2000>;

			};

		};



	usb_otg: usb@78db000 {

		compatible = "qcom,hsusb-otg";

		reg = <0x78db000 0x400>, <0x6c000 0x200>;

		reg-names = "core", "phy_csr";



		interrupts = <0 134 0>,<0 140 0>;

		interrupt-names = "core_irq", "async_irq";



		hsusb_vdd_dig-supply = <&pm8950_l2>;

		HSUSB_1p8-supply = <&pm8950_l7>;

		HSUSB_3p3-supply = <&pm8950_l13>;

		vbus_otg-supply = <&smbcharger_charger_otg>;

		qcom,vdd-voltage-level = <0 1200000 1200000>;



		qcom,hsusb-otg-phy-type = <3>; /* SNPS Femto PHY */

		qcom,hsusb-otg-mode = <3>; /* OTG mode */

		qcom,hsusb-otg-otg-control = <2>; /* PMIC */

		qcom,dp-manual-pullup;

		qcom,hsusb-otg-disable-reset;

		qcom,hsusb-otg-mpm-dpsehv-int = <49>;

		qcom,hsusb-otg-mpm-dmsehv-int = <58>;

		qcom,phy-dvdd-always-on;

		qcom,boost-sysclk-with-streaming;

		qcom,axi-prefetch-enable;



		qcom,msm-bus,name = "usb2";

		qcom,msm-bus,num-cases = <3>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

				<87 512 0 0>,

				<87 512 80000 0>,

				<87 512 6000  6000>;

		clocks = <&clock_gcc clk_gcc_usb_hs_ahb_clk>,

			 <&clock_gcc clk_gcc_usb_hs_system_clk>,

			 <&clock_gcc clk_gcc_usb2a_phy_sleep_clk>,

			 <&clock_gcc clk_bimc_usb_a_clk>,

			 <&clock_gcc clk_snoc_usb_a_clk>,

			 <&clock_gcc clk_pnoc_usb_a_clk>,

			 <&clock_gcc clk_gcc_qusb2_phy_clk>,

			 <&clock_gcc clk_gcc_usb2_hs_phy_only_clk>,

			 <&clock_gcc clk_gcc_usb_hs_phy_cfg_ahb_clk>,

			 <&clock_gcc clk_xo_otg_clk>;

		clock-names = "iface_clk", "core_clk", "sleep_clk",

				"bimc_clk", "snoc_clk", "pcnoc_clk",

				"phy_reset_clk", "phy_por_clk", "phy_csr_clk",

				"xo";

		qcom,bus-clk-rate = <350400000 200000000 100000000>;

		qcom,max-nominal-sysclk-rate = <133330000>;

	};



	android_usb: android_usb@086000c8 {

arch/arm/boot/dts/qcom/msm8996.dtsi

+62 −61
Original line number Diff line number Diff line
@@ -2066,6 +2066,68 @@ 
			snps,nominal-elastic-buffer;

			snps,hird_thresh = <0x10>;

		};



		qcom,usbbam@6b04000 {

			compatible = "qcom,usb-bam-msm";

			reg = <0x06b04000 0x1a934>;

			interrupt-parent = <&intc>;

			interrupts = <0 132 0>;



			qcom,bam-type = <0>;

			qcom,usb-bam-fifo-baseaddr = <0x066bb000>;

			qcom,usb-bam-num-pipes = <8>;

			qcom,ignore-core-reset-ack;

			qcom,disable-clk-gating;

			qcom,usb-bam-override-threshold = <0x4001>;

			qcom,usb-bam-max-mbps-highspeed = <400>;

			qcom,usb-bam-max-mbps-superspeed = <3600>;

			qcom,reset-bam-on-connect;



			qcom,pipe0 {

				label = "ssusb-ipa-out-0";

				qcom,usb-bam-mem-type = <1>;

				qcom,dir = <0>;

				qcom,pipe-num = <0>;

				qcom,peer-bam = <1>;

				qcom,src-bam-pipe-index = <1>;

				qcom,data-fifo-size = <0x8000>;

				qcom,descriptor-fifo-size = <0x2000>;

			};

			qcom,pipe1 {

				label = "ssusb-ipa-in-0";

				qcom,usb-bam-mem-type = <1>;

				qcom,dir = <1>;

				qcom,pipe-num = <0>;

				qcom,peer-bam = <1>;

				qcom,dst-bam-pipe-index = <0>;

				qcom,data-fifo-size = <0x8000>;

				qcom,descriptor-fifo-size = <0x2000>;

			};

			qcom,pipe2 {

				label = "ssusb-qdss-in-0";

				qcom,usb-bam-mem-type = <2>;

				qcom,dir = <1>;

				qcom,pipe-num = <0>;

				qcom,peer-bam = <0>;

				qcom,peer-bam-physical-address = <0x03084000>;

				qcom,src-bam-pipe-index = <0>;

				qcom,dst-bam-pipe-index = <2>;

				qcom,data-fifo-offset = <0x0>;

				qcom,data-fifo-size = <0x1800>;

				qcom,descriptor-fifo-offset = <0x1800>;

				qcom,descriptor-fifo-size = <0x800>;

			};

			qcom,pipe3 {

				label = "ssusb-dpl-ipa-in-1";

				qcom,usb-bam-mem-type = <1>;

				qcom,dir = <1>;

				qcom,pipe-num = <1>;

				qcom,peer-bam = <1>;

				qcom,dst-bam-pipe-index = <2>;

				qcom,data-fifo-size = <0x8000>;

				qcom,descriptor-fifo-size = <0x2000>;

			};

		};

	};



	usb2s: hsusb@7600000 {
@@ -2213,67 +2275,6 @@ 
		qcom,reset-ep-after-lpm-resume;

	};



	qcom,usbbam@6b04000 {

		compatible = "qcom,usb-bam-msm";

		reg = <0x06b04000 0x1a934>;

		interrupts = <0 132 0>;



		qcom,bam-type = <0>;

		qcom,usb-bam-fifo-baseaddr = <0x066bb000>;

		qcom,usb-bam-num-pipes = <8>;

		qcom,ignore-core-reset-ack;

		qcom,disable-clk-gating;

		qcom,usb-bam-override-threshold = <0x4001>;

		qcom,usb-bam-max-mbps-highspeed = <400>;

		qcom,usb-bam-max-mbps-superspeed = <3600>;

		qcom,reset-bam-on-connect;



		qcom,pipe0 {

			label = "ssusb-ipa-out-0";

			qcom,usb-bam-mem-type = <1>;

			qcom,dir = <0>;

			qcom,pipe-num = <0>;

			qcom,peer-bam = <1>;

			qcom,src-bam-pipe-index = <1>;

			qcom,data-fifo-size = <0x8000>;

			qcom,descriptor-fifo-size = <0x2000>;

		};

		qcom,pipe1 {

			label = "ssusb-ipa-in-0";

			qcom,usb-bam-mem-type = <1>;

			qcom,dir = <1>;

			qcom,pipe-num = <0>;

			qcom,peer-bam = <1>;

			qcom,dst-bam-pipe-index = <0>;

			qcom,data-fifo-size = <0x8000>;

			qcom,descriptor-fifo-size = <0x2000>;

		};

		qcom,pipe2 {

			label = "ssusb-qdss-in-0";

			qcom,usb-bam-mem-type = <2>;

			qcom,dir = <1>;

			qcom,pipe-num = <0>;

			qcom,peer-bam = <0>;

			qcom,peer-bam-physical-address = <0x03084000>;

			qcom,src-bam-pipe-index = <0>;

			qcom,dst-bam-pipe-index = <2>;

			qcom,data-fifo-offset = <0x0>;

			qcom,data-fifo-size = <0x1800>;

			qcom,descriptor-fifo-offset = <0x1800>;

			qcom,descriptor-fifo-size = <0x800>;

		};

		qcom,pipe3 {

			label = "ssusb-dpl-ipa-in-1";

			qcom,usb-bam-mem-type = <1>;

			qcom,dir = <1>;

			qcom,pipe-num = <1>;

			qcom,peer-bam = <1>;

			qcom,dst-bam-pipe-index = <2>;

			qcom,data-fifo-size = <0x8000>;

			qcom,descriptor-fifo-size = <0x2000>;

		};

	};



	spmi_bus: qcom,spmi@400f000 {

		compatible = "qcom,spmi-pmic-arb";

		reg = <0x400f000 0x1000>,

drivers/platform/msm/usb_bam.c

+1 −11
Original line number Diff line number Diff line
@@ -245,12 +245,6 @@ void msm_bam_set_hsic_host_dev(struct device *dev) 
	host_info[HSIC_CTRL].in_lpm = false;

}



void msm_bam_set_usb_dev(struct device *dev)

{

	pr_debug("%s: Updating usb device for power managment\n", __func__);

	usb_device = dev;

}



void msm_bam_set_usb_host_dev(struct device *dev)

{

	host_info[CI_CTRL].dev = dev;
@@ -3105,11 +3099,6 @@ static int usb_bam_probe(struct platform_device *pdev) 


	dev_dbg(&pdev->dev, "usb_bam_probe\n");



	if (!usb_device) {

		dev_dbg(&pdev->dev, "OTG not yet probed\n");

		return -EPROBE_DEFER;

	}



	ret = device_create_file(&pdev->dev, &dev_attr_inactivity_timer);

	if (ret) {

		dev_err(&pdev->dev, "failed to create fs node\n");
@@ -3177,6 +3166,7 @@ static int usb_bam_probe(struct platform_device *pdev) 
		destroy_workqueue(ctx->usb_bam_wq);

		return ret;

	}

	usb_device = pdev->dev.parent;

	spin_lock_init(&usb_bam_ipa_handshake_info_lock);

	if (ipa_is_ready())

		usb_bam_ipa_create_resources(bam_type);

drivers/usb/dwc3/dwc3-msm.c

+0 −2
Original line number Diff line number Diff line
@@ -2731,8 +2731,6 @@ static int dwc3_msm_probe(struct platform_device *pdev) 
		enable_irq_wake(mdwc->pmic_id_irq);

	}



	msm_bam_set_usb_dev(mdwc->dev);



	return 0;



put_dwc3: