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Commit ce96bd8a authored by Tirupathi Reddy's avatar Tirupathi Reddy Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Update APC CPR static voltage margins for 8953 



Update APC CPR closed-loop and open-loop voltage margins for
MSM8953.

CRs-Fixed: 990638
Change-Id: Ia09d60895a75b379b91f80dbf395fe58fde4bcb4
Signed-off-by: default avatarTirupathi Reddy <tirupath@codeaurora.org>
parent edf4d230

arch/arm/boot/dts/qcom/msm8953-regulator.dtsi

+12 −12
Original line number Diff line number Diff line
@@ -555,8 +555,8 @@ 
				qcom,cpr-open-loop-voltage-fuse-adjustment =

					/* Speed bin 0; CPR rev 0..7 */

					<     0      0      0     0>,

					< 15000  20000  25000 50000>,

					< 15000  20000  25000 50000>,

					< 25000      0   5000 40000>,

					< 25000      0   5000 40000>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,
@@ -575,8 +575,8 @@ 


					/* Speed bin 2; CPR rev 0..7 */

					<     0      0      0     0>,

					< 15000  20000  25000 50000>,

					< 15000  20000  25000 50000>,

					< 25000      0   5000 40000>,

					< 25000      0   5000 40000>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,
@@ -625,8 +625,8 @@ 


					/* Speed bin 7; CPR rev 0..7 */

					<     0      0      0     0>,

					< 15000  20000  25000 50000>,

					< 15000  20000  25000 50000>,

					< 25000      0   5000 40000>,

					< 25000      0   5000 40000>,

					<     0      0      0     0>,

					<     0      0      0     0>,

					<     0      0      0     0>,
@@ -636,8 +636,8 @@ 
				qcom,cpr-closed-loop-voltage-fuse-adjustment =

					/* Speed bin 0; CPR rev 0..7 */

					<      0        0        0      0>,

					<      0     5000    10000  50000>,

					<      0     5000    10000  50000>,

					<  25000        0    20000  50000>,

					<  25000        0    20000  50000>,

					<      0        0        0      0>,

					<      0        0        0      0>,

					<      0        0        0      0>,
@@ -656,8 +656,8 @@ 


					/* Speed bin 2; CPR rev 0..7 */

					<      0        0        0      0>,

					<      0     5000    10000  50000>,

					<      0     5000    10000  50000>,

					<  25000        0    20000  50000>,

					<  25000        0    20000  50000>,

					<      0        0        0      0>,

					<      0        0        0      0>,

					<      0        0        0      0>,
@@ -706,8 +706,8 @@ 


					/* Speed bin 7; CPR rev 0..7 */

					<      0        0        0      0>,

					<      0     5000    10000  50000>,

					<      0     5000    10000  50000>,

					<  25000        0    20000  50000>,

					<  25000        0    20000  50000>,

					<      0        0        0      0>,

					<      0        0        0      0>,

					<      0        0        0      0>,