Loading arch/x86/kernel/amd_iommu_init.c +10 −0 Original line number Diff line number Diff line Loading @@ -137,6 +137,11 @@ int amd_iommus_present; /* IOMMUs have a non-present cache? */ bool amd_iommu_np_cache __read_mostly; /* * Set to true if ACPI table parsing and hardware intialization went properly */ static bool amd_iommu_initialized; /* * List of protection domains - used during resume */ Loading Loading @@ -929,6 +934,8 @@ static int __init init_iommu_all(struct acpi_table_header *table) } WARN_ON(p != end); amd_iommu_initialized = true; return 0; } Loading Loading @@ -1263,6 +1270,9 @@ static int __init amd_iommu_init(void) if (acpi_table_parse("IVRS", init_iommu_all) != 0) goto free; if (!amd_iommu_initialized) goto free; if (acpi_table_parse("IVRS", init_memory_definitions) != 0) goto free; Loading Loading
arch/x86/kernel/amd_iommu_init.c +10 −0 Original line number Diff line number Diff line Loading @@ -137,6 +137,11 @@ int amd_iommus_present; /* IOMMUs have a non-present cache? */ bool amd_iommu_np_cache __read_mostly; /* * Set to true if ACPI table parsing and hardware intialization went properly */ static bool amd_iommu_initialized; /* * List of protection domains - used during resume */ Loading Loading @@ -929,6 +934,8 @@ static int __init init_iommu_all(struct acpi_table_header *table) } WARN_ON(p != end); amd_iommu_initialized = true; return 0; } Loading Loading @@ -1263,6 +1270,9 @@ static int __init amd_iommu_init(void) if (acpi_table_parse("IVRS", init_iommu_all) != 0) goto free; if (!amd_iommu_initialized) goto free; if (acpi_table_parse("IVRS", init_memory_definitions) != 0) goto free; Loading