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Commit ce54afd1 authored by Bruce Allan's avatar Bruce Allan Committed by Jeff Kirsher
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e1000e: 82577/8/9 mis-configured OEM bits during S0->Sx 



The LPLU (Low Power Link Up) and Gigabit Disable bits (a.k.a. OEM bits)
were being configured incorrectly when device goes to D3 state.

Signed-off-by: default avatarBruce Allan <bruce.w.allan@intel.com>
Tested-by: default avatarJeff Pieper <jeffrey.e.pieper@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent d9c76f99

drivers/net/e1000e/ich8lan.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -3591,7 +3591,7 @@ void e1000e_disable_gig_wol_ich8lan(struct e1000_hw *hw) 
	ew32(PHY_CTRL, phy_ctrl);

	ew32(PHY_CTRL, phy_ctrl);





	if (hw->mac.type >= e1000_pchlan) {

	if (hw->mac.type >= e1000_pchlan) {

		e1000_oem_bits_config_ich8lan(hw, true);

		e1000_oem_bits_config_ich8lan(hw, false);

		ret_val = hw->phy.ops.acquire(hw);

		ret_val = hw->phy.ops.acquire(hw);

		if (ret_val)

		if (ret_val)

			return;

			return;