Loading arch/arm/boot/dts/qcom/apq8017-no-pmi-wcd-rome-cdp.dts +145 −0 Original line number Diff line number Diff line Loading @@ -80,3 +80,148 @@ &dsi_adv7533_720p { qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; }; &pm8937_gpios { gpio@c000 { status = "ok"; qcom,mode = <1>; qcom,pull = <5>; qcom,vin-sel = <0>; qcom,src-sel = <2>; qcom,master-en = <1>; qcom,out-strength = <2>; }; gpio@c600 { status = "ok"; qcom,mode = <1>; qcom,pull = <5>; qcom,vin-sel = <0>; qcom,src-sel = <0>; qcom,master-en = <1>; qcom,out-strength = <2>; }; }; &wsa881x_211 { qcom,spkr-sd-n-gpio = <&tlmm 92 0>; }; &wsa881x_212 { qcom,spkr-sd-n-gpio = <&tlmm 92 0>; }; &wsa881x_213 { qcom,spkr-sd-n-gpio = <&tlmm 92 0>; }; &wsa881x_214 { qcom,spkr-sd-n-gpio = <&tlmm 92 0>; }; &soc { clock_audio: audio_ext_clk { compatible = "qcom,audio-ref-clk"; status = "okay"; qcom,lpass-clock = <1>; qcom,lpass-mclk-id = "sec_mclk"; qcom,codec-mclk-clk-freq = <12288000>; pinctrl-names = "sleep", "active"; pinctrl-0 = <&sec_mi2s_mclk_a_sleep>; pinctrl-1 = <&sec_mi2s_mclk_a_active>; }; }; &wcd9335 { status = "okay"; cdc-vdd-mic-bias-supply = <&pm8917_l9>; qcom,cdc-vdd-mic-bias-voltage = <3300000 3300000>; qcom,cdc-vdd-mic-bias-current = <15000>; qcom,cdc-mclk-clk-rate = <12288000>; clock-names = "wcd_clk"; clocks = <&clock_audio clk_audio_lpass_mclk>; }; &int_codec { status = "disabled"; }; &pm8937_cajon_dig { status = "disabled"; }; &pm8937_cajon_analog { status = "disabled"; }; &wsa881x_i2c_e { status = "disabled"; }; &wsa881x_i2c_f { status = "disabled"; }; &wsa881x_i2c_44 { status = "disabled"; }; &wsa881x_i2c_45 { status = "disabled"; }; &ext_codec { status = "okay"; qcom,msm-mbhc-hphl-swh = <1>; qcom,msm-mbhc-gnd-swh = <1>; qcom,audio-routing = "AIF4 VI", "MCLK", "AIF4 VI", "MICBIAS_REGULATOR", "RX_BIAS", "MCLK", "MADINPUT", "MCLK", "AIF4 MAD", "MICBIAS_REGULATOR", "AMIC1", "MIC BIAS3", "MIC BIAS3", "Handset Mic", "AMIC2", "MIC BIAS2", "MIC BIAS2", "Headset Mic", "AMIC3", "MIC BIAS3", "MIC BIAS3", "Secondary Mic", "AMIC4", "MIC BIAS3", "MIC BIAS3", "Analog Mic4", "AMIC5", "MIC BIAS4", "MIC BIAS4", "Analog Mic7", "AMIC6", "MIC BIAS4", "MIC BIAS4", "Analog Mic6", "DMIC0", "MIC BIAS1", "MIC BIAS1", "Digital Mic0", "DMIC1", "MIC BIAS1", "MIC BIAS1", "Digital Mic1", "DMIC2", "MIC BIAS3", "MIC BIAS3", "Digital Mic2", "DMIC3", "MIC BIAS3", "MIC BIAS3", "Digital Mic3", "DMIC4", "MIC BIAS4", "MIC BIAS4", "Digital Mic4", "DMIC5", "MIC BIAS4", "MIC BIAS4", "Digital Mic5", "MIC BIAS3", "MICBIAS_REGULATOR", "MIC BIAS4", "MICBIAS_REGULATOR", "SpkrLeft IN", "SPK1 OUT", "SpkrRight IN", "SPK2 OUT"; }; &slim_msm { status = "okay"; }; &dai_slim { status = "okay"; }; &wcd9xxx_intc { status = "okay"; }; &wcd_rst_gpio { status = "okay"; }; arch/arm/boot/dts/qcom/msm8917-pinctrl.dtsi +30 −0 Original line number Diff line number Diff line Loading @@ -722,6 +722,36 @@ }; }; sec_mi2s_mclk_a_lines { sec_mi2s_mclk_a_active: sec_mi2s_mclk_a_active { mux { pins = "gpio25"; function = "sec_mi2s_mclk_a"; }; config { pins = "gpio25"; drive-strength = <8>; /* 8 MA */ output-high; bias-disable; }; }; sec_mi2s_mclk_a_sleep: sec_mi2s_mclk_a_sleep { mux { pins = "gpio25"; function = "sec_mi2s_mclk_a"; }; config { pins = "gpio25"; drive-strength = <2>; /* 2 MA */ output-low; bias-pull-down; }; }; }; cdc_reset_ctrl { cdc_reset_sleep: cdc_reset_sleep { mux { Loading include/dt-bindings/clock/msm-clocks-8952.h +2 −1 Original line number Diff line number Diff line /* Copyright (c) 2014-2016, The Linux Foundation. All rights reserved. /* Copyright (c) 2014-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -339,5 +339,6 @@ #define clk_audio_ap_clk 0x312ac429 #define clk_audio_pmi_clk 0xb7ba2274 #define clk_audio_lpass_mclk 0x575ec22b #endif include/sound/q6afe-v2.h +2 −2 Original line number Diff line number Diff line /* Copyright (c) 2012-2016, The Linux Foundation. All rights reserved. /* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -329,5 +329,5 @@ int afe_send_custom_tdm_header_cfg( struct afe_param_id_custom_tdm_header_cfg *custom_tdm_header_cfg, u16 port_id); int afe_tdm_port_start(u16 port_id, struct afe_tdm_port_config *tdm_port, u32 rate); u32 rate, u16 num_groups); #endif /* __Q6AFE_V2_H__ */ sound/soc/codecs/audio-ext-clk.c +37 −12 Original line number Diff line number Diff line /* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. /* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -454,20 +454,37 @@ err: return -EINVAL; } static void audio_ref_update_afe_mclk_id(const char *ptr) static void audio_ref_update_afe_mclk_id(const char *ptr, enum clk_mux mux) { uint32_t *clk_id; switch (mux) { case AP_CLK2: clk_id = &clk2_config.clk_id; break; case LPASS_MCLK: clk_id = &digital_cdc_core_clk.clk_id; break; case LPASS_MCLK2: clk_id = &lpass_default2.clk_id; break; default: pr_err("%s Not a valid MUX ID: %d\n", __func__, mux); return; } if (!strcmp(ptr, "pri_mclk")) { pr_debug("%s: updating the mclk id with primary mclk\n", __func__); clk2_config.clk_id = Q6AFE_LPASS_CLK_ID_MCLK_1; *clk_id = Q6AFE_LPASS_CLK_ID_MCLK_1; } else if (!strcmp(ptr, "sec_mclk")) { pr_debug("%s: updating the mclk id with secondary mclk\n", __func__); clk2_config.clk_id = Q6AFE_LPASS_CLK_ID_MCLK_2; *clk_id = Q6AFE_LPASS_CLK_ID_MCLK_2; } else { pr_debug("%s: updating the mclk id with default\n", __func__); } pr_debug("%s: clk_id = 0x%x\n", __func__, clk2_config.clk_id); pr_debug("%s: clk_id = 0x%x\n", __func__, *clk_id); } static int audio_ref_clk_probe(struct platform_device *pdev) Loading @@ -487,10 +504,19 @@ static int audio_ref_clk_probe(struct platform_device *pdev) dev_dbg(&pdev->dev, "%s: qcom,lpass-clock is undefined\n", __func__); ret = of_property_read_string(pdev->dev.of_node, mclk_id, &mclk_str); if (ret) dev_dbg(&pdev->dev, "%s:of read string %s not present %d\n", __func__, mclk_id, ret); ret = of_property_read_u32(pdev->dev.of_node, "qcom,codec-mclk-clk-freq", &mclk_freq); if (!ret && (mclk_freq == 12288000 || audio_lpass_mclk.lpass_clock)) { digital_cdc_core_clk.clk_freq_in_hz = mclk_freq; ret = of_property_read_u32(pdev->dev.of_node, "reg", &lpass_csr_gpio_mux_spkrctl_reg); if (!ret) { Loading @@ -498,6 +524,11 @@ static int audio_ref_clk_probe(struct platform_device *pdev) ioremap(lpass_csr_gpio_mux_spkrctl_reg, 4); } if (mclk_str) { audio_ref_update_afe_mclk_id(mclk_str, LPASS_MCLK); audio_ref_update_afe_mclk_id(mclk_str, LPASS_MCLK2); } ret = audio_get_pinctrl(pdev, LPASS_MCLK); if (ret) dev_err(&pdev->dev, "%s: Parsing pinctrl %s failed\n", Loading @@ -516,14 +547,8 @@ static int audio_ref_clk_probe(struct platform_device *pdev) return ret; } ret = of_property_read_string(pdev->dev.of_node, mclk_id, &mclk_str); if (ret) dev_dbg(&pdev->dev, "%s:of read string %s not present %d\n", __func__, mclk_id, ret); if (mclk_str) audio_ref_update_afe_mclk_id(mclk_str); audio_ref_update_afe_mclk_id(mclk_str, AP_CLK2); clk_gpio = of_get_named_gpio(pdev->dev.of_node, "qcom,audio-ref-clk-gpio", 0); Loading Loading
arch/arm/boot/dts/qcom/apq8017-no-pmi-wcd-rome-cdp.dts +145 −0 Original line number Diff line number Diff line Loading @@ -80,3 +80,148 @@ &dsi_adv7533_720p { qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; }; &pm8937_gpios { gpio@c000 { status = "ok"; qcom,mode = <1>; qcom,pull = <5>; qcom,vin-sel = <0>; qcom,src-sel = <2>; qcom,master-en = <1>; qcom,out-strength = <2>; }; gpio@c600 { status = "ok"; qcom,mode = <1>; qcom,pull = <5>; qcom,vin-sel = <0>; qcom,src-sel = <0>; qcom,master-en = <1>; qcom,out-strength = <2>; }; }; &wsa881x_211 { qcom,spkr-sd-n-gpio = <&tlmm 92 0>; }; &wsa881x_212 { qcom,spkr-sd-n-gpio = <&tlmm 92 0>; }; &wsa881x_213 { qcom,spkr-sd-n-gpio = <&tlmm 92 0>; }; &wsa881x_214 { qcom,spkr-sd-n-gpio = <&tlmm 92 0>; }; &soc { clock_audio: audio_ext_clk { compatible = "qcom,audio-ref-clk"; status = "okay"; qcom,lpass-clock = <1>; qcom,lpass-mclk-id = "sec_mclk"; qcom,codec-mclk-clk-freq = <12288000>; pinctrl-names = "sleep", "active"; pinctrl-0 = <&sec_mi2s_mclk_a_sleep>; pinctrl-1 = <&sec_mi2s_mclk_a_active>; }; }; &wcd9335 { status = "okay"; cdc-vdd-mic-bias-supply = <&pm8917_l9>; qcom,cdc-vdd-mic-bias-voltage = <3300000 3300000>; qcom,cdc-vdd-mic-bias-current = <15000>; qcom,cdc-mclk-clk-rate = <12288000>; clock-names = "wcd_clk"; clocks = <&clock_audio clk_audio_lpass_mclk>; }; &int_codec { status = "disabled"; }; &pm8937_cajon_dig { status = "disabled"; }; &pm8937_cajon_analog { status = "disabled"; }; &wsa881x_i2c_e { status = "disabled"; }; &wsa881x_i2c_f { status = "disabled"; }; &wsa881x_i2c_44 { status = "disabled"; }; &wsa881x_i2c_45 { status = "disabled"; }; &ext_codec { status = "okay"; qcom,msm-mbhc-hphl-swh = <1>; qcom,msm-mbhc-gnd-swh = <1>; qcom,audio-routing = "AIF4 VI", "MCLK", "AIF4 VI", "MICBIAS_REGULATOR", "RX_BIAS", "MCLK", "MADINPUT", "MCLK", "AIF4 MAD", "MICBIAS_REGULATOR", "AMIC1", "MIC BIAS3", "MIC BIAS3", "Handset Mic", "AMIC2", "MIC BIAS2", "MIC BIAS2", "Headset Mic", "AMIC3", "MIC BIAS3", "MIC BIAS3", "Secondary Mic", "AMIC4", "MIC BIAS3", "MIC BIAS3", "Analog Mic4", "AMIC5", "MIC BIAS4", "MIC BIAS4", "Analog Mic7", "AMIC6", "MIC BIAS4", "MIC BIAS4", "Analog Mic6", "DMIC0", "MIC BIAS1", "MIC BIAS1", "Digital Mic0", "DMIC1", "MIC BIAS1", "MIC BIAS1", "Digital Mic1", "DMIC2", "MIC BIAS3", "MIC BIAS3", "Digital Mic2", "DMIC3", "MIC BIAS3", "MIC BIAS3", "Digital Mic3", "DMIC4", "MIC BIAS4", "MIC BIAS4", "Digital Mic4", "DMIC5", "MIC BIAS4", "MIC BIAS4", "Digital Mic5", "MIC BIAS3", "MICBIAS_REGULATOR", "MIC BIAS4", "MICBIAS_REGULATOR", "SpkrLeft IN", "SPK1 OUT", "SpkrRight IN", "SPK2 OUT"; }; &slim_msm { status = "okay"; }; &dai_slim { status = "okay"; }; &wcd9xxx_intc { status = "okay"; }; &wcd_rst_gpio { status = "okay"; };
arch/arm/boot/dts/qcom/msm8917-pinctrl.dtsi +30 −0 Original line number Diff line number Diff line Loading @@ -722,6 +722,36 @@ }; }; sec_mi2s_mclk_a_lines { sec_mi2s_mclk_a_active: sec_mi2s_mclk_a_active { mux { pins = "gpio25"; function = "sec_mi2s_mclk_a"; }; config { pins = "gpio25"; drive-strength = <8>; /* 8 MA */ output-high; bias-disable; }; }; sec_mi2s_mclk_a_sleep: sec_mi2s_mclk_a_sleep { mux { pins = "gpio25"; function = "sec_mi2s_mclk_a"; }; config { pins = "gpio25"; drive-strength = <2>; /* 2 MA */ output-low; bias-pull-down; }; }; }; cdc_reset_ctrl { cdc_reset_sleep: cdc_reset_sleep { mux { Loading
include/dt-bindings/clock/msm-clocks-8952.h +2 −1 Original line number Diff line number Diff line /* Copyright (c) 2014-2016, The Linux Foundation. All rights reserved. /* Copyright (c) 2014-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -339,5 +339,6 @@ #define clk_audio_ap_clk 0x312ac429 #define clk_audio_pmi_clk 0xb7ba2274 #define clk_audio_lpass_mclk 0x575ec22b #endif
include/sound/q6afe-v2.h +2 −2 Original line number Diff line number Diff line /* Copyright (c) 2012-2016, The Linux Foundation. All rights reserved. /* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -329,5 +329,5 @@ int afe_send_custom_tdm_header_cfg( struct afe_param_id_custom_tdm_header_cfg *custom_tdm_header_cfg, u16 port_id); int afe_tdm_port_start(u16 port_id, struct afe_tdm_port_config *tdm_port, u32 rate); u32 rate, u16 num_groups); #endif /* __Q6AFE_V2_H__ */
sound/soc/codecs/audio-ext-clk.c +37 −12 Original line number Diff line number Diff line /* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. /* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -454,20 +454,37 @@ err: return -EINVAL; } static void audio_ref_update_afe_mclk_id(const char *ptr) static void audio_ref_update_afe_mclk_id(const char *ptr, enum clk_mux mux) { uint32_t *clk_id; switch (mux) { case AP_CLK2: clk_id = &clk2_config.clk_id; break; case LPASS_MCLK: clk_id = &digital_cdc_core_clk.clk_id; break; case LPASS_MCLK2: clk_id = &lpass_default2.clk_id; break; default: pr_err("%s Not a valid MUX ID: %d\n", __func__, mux); return; } if (!strcmp(ptr, "pri_mclk")) { pr_debug("%s: updating the mclk id with primary mclk\n", __func__); clk2_config.clk_id = Q6AFE_LPASS_CLK_ID_MCLK_1; *clk_id = Q6AFE_LPASS_CLK_ID_MCLK_1; } else if (!strcmp(ptr, "sec_mclk")) { pr_debug("%s: updating the mclk id with secondary mclk\n", __func__); clk2_config.clk_id = Q6AFE_LPASS_CLK_ID_MCLK_2; *clk_id = Q6AFE_LPASS_CLK_ID_MCLK_2; } else { pr_debug("%s: updating the mclk id with default\n", __func__); } pr_debug("%s: clk_id = 0x%x\n", __func__, clk2_config.clk_id); pr_debug("%s: clk_id = 0x%x\n", __func__, *clk_id); } static int audio_ref_clk_probe(struct platform_device *pdev) Loading @@ -487,10 +504,19 @@ static int audio_ref_clk_probe(struct platform_device *pdev) dev_dbg(&pdev->dev, "%s: qcom,lpass-clock is undefined\n", __func__); ret = of_property_read_string(pdev->dev.of_node, mclk_id, &mclk_str); if (ret) dev_dbg(&pdev->dev, "%s:of read string %s not present %d\n", __func__, mclk_id, ret); ret = of_property_read_u32(pdev->dev.of_node, "qcom,codec-mclk-clk-freq", &mclk_freq); if (!ret && (mclk_freq == 12288000 || audio_lpass_mclk.lpass_clock)) { digital_cdc_core_clk.clk_freq_in_hz = mclk_freq; ret = of_property_read_u32(pdev->dev.of_node, "reg", &lpass_csr_gpio_mux_spkrctl_reg); if (!ret) { Loading @@ -498,6 +524,11 @@ static int audio_ref_clk_probe(struct platform_device *pdev) ioremap(lpass_csr_gpio_mux_spkrctl_reg, 4); } if (mclk_str) { audio_ref_update_afe_mclk_id(mclk_str, LPASS_MCLK); audio_ref_update_afe_mclk_id(mclk_str, LPASS_MCLK2); } ret = audio_get_pinctrl(pdev, LPASS_MCLK); if (ret) dev_err(&pdev->dev, "%s: Parsing pinctrl %s failed\n", Loading @@ -516,14 +547,8 @@ static int audio_ref_clk_probe(struct platform_device *pdev) return ret; } ret = of_property_read_string(pdev->dev.of_node, mclk_id, &mclk_str); if (ret) dev_dbg(&pdev->dev, "%s:of read string %s not present %d\n", __func__, mclk_id, ret); if (mclk_str) audio_ref_update_afe_mclk_id(mclk_str); audio_ref_update_afe_mclk_id(mclk_str, AP_CLK2); clk_gpio = of_get_named_gpio(pdev->dev.of_node, "qcom,audio-ref-clk-gpio", 0); Loading