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Commit cb809b1a authored Sep 21, 2010 by Greg Ungerer Committed by Nicolas Ferre Oct 07, 2010

AT91: fix use of clock disable on idle for AT91x40 devices



The simpler AT91x40 processors do not have the same power management
controller as the new AT91 devices. They do have a simpler power
controller module that we can use to disable the CPU clock at idle
time. Add code to support that.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>

parent a6e016f1

arch/arm/mach-at91/include/mach/at91x40.h

+6 −0

Original line number	Original line	Diff line number	Diff line
	@@ -52,4 +52,10 @@
	#define AT91_DBGU_CIDR (AT91_SF + 0) /* CIDR in PS segment */		#define AT91_DBGU_CIDR (AT91_SF + 0) /* CIDR in PS segment */
	#define AT91_DBGU_EXID (AT91_SF + 4) /* EXID in PS segment */		#define AT91_DBGU_EXID (AT91_SF + 4) /* EXID in PS segment */

			/*
			* Support defines for the simple Power Controller module.
			*/
			#define AT91_PS_CR (AT91_PS + 0) /* PS Control register */
			#define AT91_PS_CR_CPU (1 << 0) /* CPU clock disable bit */

	#endif /* AT91X40_H */		#endif /* AT91X40_H */

arch/arm/mach-at91/include/mach/system.h

+4 −0

Original line number	Original line	Diff line number	Diff line
	@@ -33,7 +33,11 @@ static inline void arch_idle(void)
	* Disable the processor clock. The processor will be automatically		* Disable the processor clock. The processor will be automatically
	* re-enabled by an interrupt or by a reset.		* re-enabled by an interrupt or by a reset.
	*/		*/
			#ifdef AT91_PS
			at91_sys_write(AT91_PS_CR, AT91_PS_CR_CPU);
			#else
	at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);		at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
			#endif
	#else		#else
	/*		/*
	* Set the processor (CP15) into 'Wait for Interrupt' mode.		* Set the processor (CP15) into 'Wait for Interrupt' mode.