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Commit cb366258 authored by Pawel Moll's avatar Pawel Moll Committed by Sasha Levin
Browse files

bus: arm-ccn: Fix XP watchpoint settings bitmask 



[ Upstream commit b928466b2169e061822daad48ecf55b005445547 ]

The code setting XP watchpoint comparator and mask registers should, in
order to be fully compliant with specification, zero one or more most
significant bits of each field. In both L cases it means zeroing bit 63.
The bitmask doing this was wrong, though, zeroing bit 60 instead.
Fortunately, due to a lucky coincidence, this turned out to be fairly
innocent with the existing hardware.

Fixed now.

Cc: stable@vger.kernel.org # 3.17+
Signed-off-by: default avatarPawel Moll <pawel.moll@arm.com>
Signed-off-by: default avatarSasha Levin <alexander.levin@verizon.com>
parent 703dd66f

drivers/bus/arm-ccn.c

+2 −2
Original line number Diff line number Diff line
@@ -905,7 +905,7 @@ static void arm_ccn_pmu_xp_watchpoint_config(struct perf_event *event) 


	/* Comparison values */

	writel(cmp_l & 0xffffffff, source->base + CCN_XP_DT_CMP_VAL_L(wp));

	writel((cmp_l >> 32) & 0xefffffff,

	writel((cmp_l >> 32) & 0x7fffffff,

			source->base + CCN_XP_DT_CMP_VAL_L(wp) + 4);

	writel(cmp_h & 0xffffffff, source->base + CCN_XP_DT_CMP_VAL_H(wp));

	writel((cmp_h >> 32) & 0x0fffffff,
@@ -913,7 +913,7 @@ static void arm_ccn_pmu_xp_watchpoint_config(struct perf_event *event) 


	/* Mask */

	writel(mask_l & 0xffffffff, source->base + CCN_XP_DT_CMP_MASK_L(wp));

	writel((mask_l >> 32) & 0xefffffff,

	writel((mask_l >> 32) & 0x7fffffff,

			source->base + CCN_XP_DT_CMP_MASK_L(wp) + 4);

	writel(mask_h & 0xffffffff, source->base + CCN_XP_DT_CMP_MASK_H(wp));

	writel((mask_h >> 32) & 0x0fffffff,