Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit cb1793ce authored by Daniel Vetter's avatar Daniel Vetter
Browse files

drm/i915: don't chnage the original mode in dp_mode_fixup 



We should only frob adjusted_mode. This is in preparation of
a massive patch by Laurent Pinchart to make the mode argument
const.

After the previous two prep patches the only thing left is to clean up
things a bit. I've opted to pass in an adjust_mode param to
dp_adjust_dithering because that way we can be sure to avoid
duplicating this logic between mode_valid and mode_fixup - which was
the cause behind a dp link bw calculation bug in the past.

Also mark the mode argument of pch_panel_fitting const.

v2: Split up the mode->clock => adjusted_mode->clock change,
as suggested by Chris Wilson.

Reported-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 71244653

drivers/gpu/drm/i915/intel_dp.c

+6 −6
Original line number Diff line number Diff line
@@ -234,7 +234,7 @@ intel_dp_max_data_rate(int max_link_clock, int max_lanes) 
static bool

intel_dp_adjust_dithering(struct intel_dp *intel_dp,

			  struct drm_display_mode *mode,

			  struct drm_display_mode *adjusted_mode)

			  bool adjust_mode)

{

	int max_link_clock = intel_dp_link_clock(intel_dp_max_link_bw(intel_dp));

	int max_lanes = intel_dp_max_lane_count(intel_dp);
@@ -248,8 +248,8 @@ intel_dp_adjust_dithering(struct intel_dp *intel_dp, 
		if (mode_rate > max_rate)

			return false;



		if (adjusted_mode)

			adjusted_mode->private_flags

		if (adjust_mode)

			mode->private_flags

				|= INTEL_MODE_DP_FORCE_6BPC;



		return true;
@@ -272,7 +272,7 @@ intel_dp_mode_valid(struct drm_connector *connector, 
			return MODE_PANEL;

	}



	if (!intel_dp_adjust_dithering(intel_dp, mode, NULL))

	if (!intel_dp_adjust_dithering(intel_dp, mode, false))

		return MODE_CLOCK_HIGH;



	if (mode->clock < 10000)
@@ -712,14 +712,14 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode, 
					mode, adjusted_mode);

	}



	if (mode->flags & DRM_MODE_FLAG_DBLCLK)

	if (adjusted_mode->flags & DRM_MODE_FLAG_DBLCLK)

		return false;



	DRM_DEBUG_KMS("DP link computation with max lane count %i "

		      "max bw %02x pixel clock %iKHz\n",

		      max_lane_count, bws[max_clock], adjusted_mode->clock);



	if (!intel_dp_adjust_dithering(intel_dp, adjusted_mode, adjusted_mode))

	if (!intel_dp_adjust_dithering(intel_dp, adjusted_mode, true))

		return false;



	bpp = adjusted_mode->private_flags & INTEL_MODE_DP_FORCE_6BPC ? 18 : 24;

drivers/gpu/drm/i915/intel_drv.h

+1 −1
Original line number Diff line number Diff line
@@ -373,7 +373,7 @@ extern void intel_fixed_panel_mode(struct drm_display_mode *fixed_mode, 
				   struct drm_display_mode *adjusted_mode);

extern void intel_pch_panel_fitting(struct drm_device *dev,

				    int fitting_mode,

				    struct drm_display_mode *mode,

				    const struct drm_display_mode *mode,

				    struct drm_display_mode *adjusted_mode);

extern u32 intel_panel_get_max_backlight(struct drm_device *dev);

extern u32 intel_panel_get_backlight(struct drm_device *dev);

drivers/gpu/drm/i915/intel_panel.c

+1 −1
Original line number Diff line number Diff line
@@ -56,7 +56,7 @@ intel_fixed_panel_mode(struct drm_display_mode *fixed_mode, 
void

intel_pch_panel_fitting(struct drm_device *dev,

			int fitting_mode,

			struct drm_display_mode *mode,

			const struct drm_display_mode *mode,

			struct drm_display_mode *adjusted_mode)

{

	struct drm_i915_private *dev_priv = dev->dev_private;