Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit cb04e95b authored by Seth Heasley's avatar Seth Heasley Committed by Jesse Barnes
Browse files

PCI: update Intel chipset names and defines



This patch updates the defines for Intel devices in
include/linux/pci_ids.h, referenced in arch/x86/pci/irq.c and
drivers/i2c/busses/i2c-i801.c, reflecting approved legal branding, and
using fuller code-names for products under development.

Acked-by: default avatarJean Delvare <khali@linux-fr.org>
Signed-off-by: default avatarSeth Heasley <seth.heasley@intel.com>
Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
parent 350a55e9
Loading
Loading
Loading
Loading
+6 −6
Original line number Diff line number Diff line
@@ -584,28 +584,28 @@ static __init int intel_router_probe(struct irq_router *r, struct pci_dev *route
	case PCI_DEVICE_ID_INTEL_ICH9_3:
	case PCI_DEVICE_ID_INTEL_ICH9_4:
	case PCI_DEVICE_ID_INTEL_ICH9_5:
	case PCI_DEVICE_ID_INTEL_TOLAPAI_0:
	case PCI_DEVICE_ID_INTEL_EP80579_0:
	case PCI_DEVICE_ID_INTEL_ICH10_0:
	case PCI_DEVICE_ID_INTEL_ICH10_1:
	case PCI_DEVICE_ID_INTEL_ICH10_2:
	case PCI_DEVICE_ID_INTEL_ICH10_3:
	case PCI_DEVICE_ID_INTEL_PBG_LPC:
	case PCI_DEVICE_ID_INTEL_PATSBURG_LPC:
		r->name = "PIIX/ICH";
		r->get = pirq_piix_get;
		r->set = pirq_piix_set;
		return 1;
	}

	if ((device >= PCI_DEVICE_ID_INTEL_PCH_LPC_MIN) && 
		(device <= PCI_DEVICE_ID_INTEL_PCH_LPC_MAX)) {
	if ((device >= PCI_DEVICE_ID_INTEL_5_3400_SERIES_LPC_MIN) && 
		(device <= PCI_DEVICE_ID_INTEL_5_3400_SERIES_LPC_MAX)) {
		r->name = "PIIX/ICH";
		r->get = pirq_piix_get;
		r->set = pirq_piix_set;
		return 1;
	}

	if ((device >= PCI_DEVICE_ID_INTEL_CPT_LPC_MIN) && 
		(device <= PCI_DEVICE_ID_INTEL_CPT_LPC_MAX)) {
	if ((device >= PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN) && 
		(device <= PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX)) {
		r->name = "PIIX/ICH";
		r->get = pirq_piix_get;
		r->set = pirq_piix_set;
+2 −2
Original line number Diff line number Diff line
@@ -95,9 +95,9 @@ config I2C_I801
	    ESB2
	    ICH8
	    ICH9
	    Tolapai
	    EP80579 (Tolapai)
	    ICH10
	    3400/5 Series (PCH)
	    5/3400 Series (PCH)
	    Cougar Point (PCH)

	  This driver can also be built as a module.  If so, the module
+5 −5
Original line number Diff line number Diff line
@@ -38,10 +38,10 @@
  82801G   (ICH7)       0x27da     32     hard     yes     yes     yes
  82801H   (ICH8)       0x283e     32     hard     yes     yes     yes
  82801I   (ICH9)       0x2930     32     hard     yes     yes     yes
  Tolapai               0x5032     32     hard     yes     yes     yes
  EP80579 (Tolapai)     0x5032     32     hard     yes     yes     yes
  ICH10                 0x3a30     32     hard     yes     yes     yes
  ICH10                 0x3a60     32     hard     yes     yes     yes
  3400/5 Series (PCH)   0x3b30     32     hard     yes     yes     yes
  5/3400 Series (PCH)   0x3b30     32     hard     yes     yes     yes
  Cougar Point (PCH)    0x1c22     32     hard     yes     yes     yes

  Features supported by this driver:
@@ -587,11 +587,11 @@ static const struct pci_device_id i801_ids[] = {
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB2_17) },
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_5) },
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_6) },
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TOLAPAI_1) },
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EP80579_1) },
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_4) },
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_5) },
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PCH_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CPT_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS) },
	{ 0, }
};

+9 −9
Original line number Diff line number Diff line
@@ -2435,10 +2435,10 @@
#define PCI_DEVICE_ID_INTEL_82840_HB	0x1a21
#define PCI_DEVICE_ID_INTEL_82845_HB	0x1a30
#define PCI_DEVICE_ID_INTEL_IOAT	0x1a38
#define PCI_DEVICE_ID_INTEL_CPT_SMBUS	0x1c22
#define PCI_DEVICE_ID_INTEL_CPT_LPC_MIN	0x1c41
#define PCI_DEVICE_ID_INTEL_CPT_LPC_MAX	0x1c5f
#define PCI_DEVICE_ID_INTEL_PBG_LPC	0x1d40
#define PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS	0x1c22
#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN	0x1c41
#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX	0x1c5f
#define PCI_DEVICE_ID_INTEL_PATSBURG_LPC	0x1d40
#define PCI_DEVICE_ID_INTEL_82801AA_0	0x2410
#define PCI_DEVICE_ID_INTEL_82801AA_1	0x2411
#define PCI_DEVICE_ID_INTEL_82801AA_3	0x2413
@@ -2644,9 +2644,9 @@
#define PCI_DEVICE_ID_INTEL_ICH10_3	0x3a1a
#define PCI_DEVICE_ID_INTEL_ICH10_4	0x3a30
#define PCI_DEVICE_ID_INTEL_ICH10_5	0x3a60
#define PCI_DEVICE_ID_INTEL_PCH_LPC_MIN	0x3b00
#define PCI_DEVICE_ID_INTEL_PCH_LPC_MAX	0x3b1f
#define PCI_DEVICE_ID_INTEL_PCH_SMBUS	0x3b30
#define PCI_DEVICE_ID_INTEL_5_3400_SERIES_LPC_MIN	0x3b00
#define PCI_DEVICE_ID_INTEL_5_3400_SERIES_LPC_MAX	0x3b1f
#define PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS	0x3b30
#define PCI_DEVICE_ID_INTEL_IOAT_SNB	0x402f
#define PCI_DEVICE_ID_INTEL_5100_16	0x65f0
#define PCI_DEVICE_ID_INTEL_5100_21	0x65f5
@@ -2655,8 +2655,8 @@
#define PCI_DEVICE_ID_INTEL_5400_FBD0	0x4035
#define PCI_DEVICE_ID_INTEL_5400_FBD1	0x4036
#define PCI_DEVICE_ID_INTEL_IOAT_SCNB	0x65ff
#define PCI_DEVICE_ID_INTEL_TOLAPAI_0	0x5031
#define PCI_DEVICE_ID_INTEL_TOLAPAI_1	0x5032
#define PCI_DEVICE_ID_INTEL_EP80579_0	0x5031
#define PCI_DEVICE_ID_INTEL_EP80579_1	0x5032
#define PCI_DEVICE_ID_INTEL_82371SB_0	0x7000
#define PCI_DEVICE_ID_INTEL_82371SB_1	0x7010
#define PCI_DEVICE_ID_INTEL_82371SB_2	0x7020