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Commit c9f86e25 authored by Devdutt Patnaik's avatar Devdutt Patnaik
Browse files

ARM: dts: msm: Update USB core clock frequency to allow SVS 



Set USB core clock frequency to recommended values to allow SVS mode
with cable connected.

Change-Id: Iaae368e929dcc876f7dc41ad3fbaa682753492e1
Signed-off-by: default avatarDevdutt Patnaik <dpatnaik@codeaurora.org>
parent 25a2528e

arch/arm/boot/dts/qcom/mdmcalifornium-usb.dtsi

+2 −1
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2015, The Linux Foundation. All rights reserved.

 * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -54,6 +54,7 @@ 
		clock-names = "core_clk", "iface_clk", "utmi_clk", "sleep_clk",

				"xo", "cfg_ahb_clk";



		qcom,core-clk-rate = <120000000>;

		dwc3@8a00000 {

			compatible = "snps,dwc3";

			reg = <0x08a00000 0xcd00>;

arch/arm/boot/dts/qcom/msm8996.dtsi

+3 −1
Original line number Diff line number Diff line 
/* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.

/* Copyright (c) 2014-2016, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -1890,6 +1890,7 @@ 
		clock-names = "core_clk", "iface_clk", "bus_aggr_clk", "utmi_clk",

				"sleep_clk", "xo", "cfg_ahb_clk";



		qcom,core-clk-rate = <120000000>;

		dwc3@6a00000 {

			compatible = "snps,dwc3";

			reg = <0x06a00000 0xc8d0>;
@@ -1996,6 +1997,7 @@ 
		clock-names = "core_clk", "iface_clk", "utmi_clk", "sleep_clk",

				"xo", "cfg_ahb_clk";



		qcom,core-clk-rate = <60000000>;

		dwc3@7600000 {

			compatible = "snps,dwc3";

			reg = <0x07600000 0xc8d0>;