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Commit c85c7c9f authored by Mitchel Humpherys's avatar Mitchel Humpherys Committed by Matt Wagantall
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iommu/arm-smmu: don't touch the secure STLBIALL register 



Currently we do a STLBIALL when we initialize the SMMU.  However, in
some configurations that register is not supposed to be touched and is
marked as "Secure only" in the spec.  Rip it out.

Change-Id: I3a6e3f171f8f9fd82257270e3a7202ecbc8bd6ad
Signed-off-by: default avatarMitchel Humpherys <mitchelh@codeaurora.org>
parent 465b9e8a

drivers/iommu/arm-smmu.c

+0 −2
Original line number Original line Diff line number Diff line
@@ -175,7 +175,6 @@ 
#define PIDR2_ARCH_MASK			0xf

#define PIDR2_ARCH_MASK			0xf





/* Global TLB invalidation */

/* Global TLB invalidation */

#define ARM_SMMU_GR0_STLBIALL		0x60

#define ARM_SMMU_GR0_TLBIVMID		0x64

#define ARM_SMMU_GR0_TLBIVMID		0x64

#define ARM_SMMU_GR0_TLBIALLNSNH	0x68

#define ARM_SMMU_GR0_TLBIALLNSNH	0x68

#define ARM_SMMU_GR0_TLBIALLH		0x6c

#define ARM_SMMU_GR0_TLBIALLH		0x6c
@@ -2077,7 +2076,6 @@ static void arm_smmu_device_reset(struct arm_smmu_device *smmu) 
	}

	}





	/* Invalidate the TLB, just in case */

	/* Invalidate the TLB, just in case */

	writel_relaxed(0, gr0_base + ARM_SMMU_GR0_STLBIALL);

	writel_relaxed(0, gr0_base + ARM_SMMU_GR0_TLBIALLH);

	writel_relaxed(0, gr0_base + ARM_SMMU_GR0_TLBIALLH);

	writel_relaxed(0, gr0_base + ARM_SMMU_GR0_TLBIALLNSNH);

	writel_relaxed(0, gr0_base + ARM_SMMU_GR0_TLBIALLNSNH);