Loading arch/arm64/Kconfig +10 −0 Original line number Diff line number Diff line Loading @@ -485,6 +485,16 @@ config ARM64_ICACHE_DISABLE If you are not sure what to do, select 'N' here. config ENABLE_FP_SIMD_SETTINGS bool "Enable FP(Floating Point) Settings for Qualcomm MSM8996" depends on ARCH_MSM8996 help Enable FP(Floating Point) and SIMD settings for the MSM8996 during the execution of the aarch32 processes and disable these settings when you switch to the aarch64 processes. If you are not sure what to do, select 'N' here. choice prompt "Virtual address space size" default ARM64_VA_BITS_39 if ARM64_4K_PAGES Loading arch/arm64/include/asm/elf.h +8 −1 Original line number Diff line number Diff line Loading @@ -23,6 +23,7 @@ */ #include <asm/ptrace.h> #include <asm/user.h> #include <asm/fpsimd.h> typedef unsigned long elf_greg_t; Loading Loading @@ -181,7 +182,13 @@ typedef compat_elf_greg_t compat_elf_gregset_t[COMPAT_ELF_NGREG]; ((x)->e_flags & EF_ARM_EABI_MASK)) #define compat_start_thread compat_start_thread #define COMPAT_SET_PERSONALITY(ex) set_thread_flag(TIF_32BIT); #define COMPAT_SET_PERSONALITY(ex) \ do { \ if (current->mm) \ fpsimd_enable_trap(); \ set_thread_flag(TIF_32BIT); \ } while (0) #define COMPAT_ARCH_DLINFO extern int aarch32_setup_vectors_page(struct linux_binprm *bprm, int uses_interp); Loading arch/arm64/include/asm/fpsimd.h +12 −0 Original line number Diff line number Diff line Loading @@ -81,6 +81,18 @@ extern void fpsimd_save_partial_state(struct fpsimd_partial_state *state, u32 num_regs); extern void fpsimd_load_partial_state(struct fpsimd_partial_state *state); #ifdef CONFIG_ENABLE_FP_SIMD_SETTINGS extern void fpsimd_disable_trap(void); extern void fpsimd_enable_trap(void); extern void fpsimd_settings_disable(void); extern void fpsimd_settings_enable(void); #else static inline void fpsimd_disable_trap(void) {} static inline void fpsimd_enable_trap(void) {} static inline void fpsimd_settings_disable(void) {} static inline void fpsimd_settings_enable(void) {} #endif #endif #endif arch/arm64/kernel/entry-fpsimd.S +32 −0 Original line number Diff line number Diff line Loading @@ -64,4 +64,36 @@ ENTRY(fpsimd_load_partial_state) ret ENDPROC(fpsimd_load_partial_state) #ifdef CONFIG_ENABLE_FP_SIMD_SETTINGS ENTRY(fpsimd_enable_trap) mrs x0, cpacr_el1 bic x0, x0, #(3 << 20) orr x0, x0, #(1 << 20) msr cpacr_el1, x0 ret ENDPROC(fpsimd_enable_trap) ENTRY(fpsimd_disable_trap) mrs x0, cpacr_el1 orr x0, x0, #(3 << 20) msr cpacr_el1, x0 ret ENDPROC(fpsimd_disable_trap) ENTRY(fpsimd_settings_enable) mrs x0, s3_1_c15_c15_0 orr x0, x0, #(1 << 31) isb msr s3_1_c15_c15_0, x0 isb ret ENDPROC(fpsimd_settings_enable) ENTRY(fpsimd_settings_disable) mrs x0, s3_1_c15_c15_0 bic x0, x0, #(1 << 31) isb msr s3_1_c15_c15_0, x0 isb ret ENDPROC(fpsimd_settings_disable) #endif #endif arch/arm64/kernel/entry.S +12 −1 Original line number Diff line number Diff line Loading @@ -432,7 +432,7 @@ el0_sync_compat: cmp x24, #ESR_EL1_EC_IABT_EL0 // instruction abort in EL0 b.eq el0_ia cmp x24, #ESR_EL1_EC_FP_ASIMD // FP/ASIMD access b.eq el0_fpsimd_acc b.eq el0_fpsimd_acc_compat cmp x24, #ESR_EL1_EC_FP_EXC32 // FP/ASIMD exception b.eq el0_fpsimd_exc cmp x24, #ESR_EL1_EC_UNKNOWN // unknown exception in EL0 Loading Loading @@ -501,6 +501,17 @@ el0_fpsimd_acc: mov x1, sp bl do_fpsimd_acc b ret_to_user el0_fpsimd_acc_compat: /* * Floating Point or Advanced SIMD access */ enable_dbg ct_user_exit mov x0, x25 mov x1, sp bl do_fpsimd_acc_compat b ret_to_user el0_fpsimd_exc: /* * Floating Point or Advanced SIMD exception Loading Loading
arch/arm64/Kconfig +10 −0 Original line number Diff line number Diff line Loading @@ -485,6 +485,16 @@ config ARM64_ICACHE_DISABLE If you are not sure what to do, select 'N' here. config ENABLE_FP_SIMD_SETTINGS bool "Enable FP(Floating Point) Settings for Qualcomm MSM8996" depends on ARCH_MSM8996 help Enable FP(Floating Point) and SIMD settings for the MSM8996 during the execution of the aarch32 processes and disable these settings when you switch to the aarch64 processes. If you are not sure what to do, select 'N' here. choice prompt "Virtual address space size" default ARM64_VA_BITS_39 if ARM64_4K_PAGES Loading
arch/arm64/include/asm/elf.h +8 −1 Original line number Diff line number Diff line Loading @@ -23,6 +23,7 @@ */ #include <asm/ptrace.h> #include <asm/user.h> #include <asm/fpsimd.h> typedef unsigned long elf_greg_t; Loading Loading @@ -181,7 +182,13 @@ typedef compat_elf_greg_t compat_elf_gregset_t[COMPAT_ELF_NGREG]; ((x)->e_flags & EF_ARM_EABI_MASK)) #define compat_start_thread compat_start_thread #define COMPAT_SET_PERSONALITY(ex) set_thread_flag(TIF_32BIT); #define COMPAT_SET_PERSONALITY(ex) \ do { \ if (current->mm) \ fpsimd_enable_trap(); \ set_thread_flag(TIF_32BIT); \ } while (0) #define COMPAT_ARCH_DLINFO extern int aarch32_setup_vectors_page(struct linux_binprm *bprm, int uses_interp); Loading
arch/arm64/include/asm/fpsimd.h +12 −0 Original line number Diff line number Diff line Loading @@ -81,6 +81,18 @@ extern void fpsimd_save_partial_state(struct fpsimd_partial_state *state, u32 num_regs); extern void fpsimd_load_partial_state(struct fpsimd_partial_state *state); #ifdef CONFIG_ENABLE_FP_SIMD_SETTINGS extern void fpsimd_disable_trap(void); extern void fpsimd_enable_trap(void); extern void fpsimd_settings_disable(void); extern void fpsimd_settings_enable(void); #else static inline void fpsimd_disable_trap(void) {} static inline void fpsimd_enable_trap(void) {} static inline void fpsimd_settings_disable(void) {} static inline void fpsimd_settings_enable(void) {} #endif #endif #endif
arch/arm64/kernel/entry-fpsimd.S +32 −0 Original line number Diff line number Diff line Loading @@ -64,4 +64,36 @@ ENTRY(fpsimd_load_partial_state) ret ENDPROC(fpsimd_load_partial_state) #ifdef CONFIG_ENABLE_FP_SIMD_SETTINGS ENTRY(fpsimd_enable_trap) mrs x0, cpacr_el1 bic x0, x0, #(3 << 20) orr x0, x0, #(1 << 20) msr cpacr_el1, x0 ret ENDPROC(fpsimd_enable_trap) ENTRY(fpsimd_disable_trap) mrs x0, cpacr_el1 orr x0, x0, #(3 << 20) msr cpacr_el1, x0 ret ENDPROC(fpsimd_disable_trap) ENTRY(fpsimd_settings_enable) mrs x0, s3_1_c15_c15_0 orr x0, x0, #(1 << 31) isb msr s3_1_c15_c15_0, x0 isb ret ENDPROC(fpsimd_settings_enable) ENTRY(fpsimd_settings_disable) mrs x0, s3_1_c15_c15_0 bic x0, x0, #(1 << 31) isb msr s3_1_c15_c15_0, x0 isb ret ENDPROC(fpsimd_settings_disable) #endif #endif
arch/arm64/kernel/entry.S +12 −1 Original line number Diff line number Diff line Loading @@ -432,7 +432,7 @@ el0_sync_compat: cmp x24, #ESR_EL1_EC_IABT_EL0 // instruction abort in EL0 b.eq el0_ia cmp x24, #ESR_EL1_EC_FP_ASIMD // FP/ASIMD access b.eq el0_fpsimd_acc b.eq el0_fpsimd_acc_compat cmp x24, #ESR_EL1_EC_FP_EXC32 // FP/ASIMD exception b.eq el0_fpsimd_exc cmp x24, #ESR_EL1_EC_UNKNOWN // unknown exception in EL0 Loading Loading @@ -501,6 +501,17 @@ el0_fpsimd_acc: mov x1, sp bl do_fpsimd_acc b ret_to_user el0_fpsimd_acc_compat: /* * Floating Point or Advanced SIMD access */ enable_dbg ct_user_exit mov x0, x25 mov x1, sp bl do_fpsimd_acc_compat b ret_to_user el0_fpsimd_exc: /* * Floating Point or Advanced SIMD exception Loading