Loading Documentation/devicetree/bindings/usb/msm-ssusb.txt +1 −0 Original line number Diff line number Diff line Loading @@ -41,6 +41,7 @@ Optional properties : - qcom,disable-dev-mode-pm: If present, it disables PM runtime functionality for device mode. - qcom,disable-host-mode-pm: If present, it disables XHCI PM runtime functionality when USB host mode is used. - qcom,core-clk-rate: If present, indicates clock frequency to be set for USB master clock. Sub nodes: - Sub node for "DWC3- USB3 controller". This sub node is required property for device node. The properties of this subnode Loading drivers/usb/dwc3/dwc3-msm.c +14 −5 Original line number Diff line number Diff line Loading @@ -2540,14 +2540,23 @@ static int dwc3_msm_get_clk_gdsc(struct dwc3_msm *mdwc) return ret; } if (!of_property_read_u32(mdwc->dev->of_node, "qcom,core-clk-rate", (u32 *)&mdwc->core_clk_rate)) { mdwc->core_clk_rate = clk_round_rate(mdwc->core_clk, mdwc->core_clk_rate); } else { /* * Get Max supported clk frequency for USB Core CLK and request * to set the same. */ mdwc->core_clk_rate = clk_round_rate(mdwc->core_clk, LONG_MAX); } if (IS_ERR_VALUE(mdwc->core_clk_rate)) { dev_err(mdwc->dev, "fail to get core clk max freq.\n"); } else { dev_dbg(mdwc->dev, "USB core frequency = %ld\n", mdwc->core_clk_rate); ret = clk_set_rate(mdwc->core_clk, mdwc->core_clk_rate); if (ret) dev_err(mdwc->dev, "fail to set core_clk freq:%d\n", Loading Loading
Documentation/devicetree/bindings/usb/msm-ssusb.txt +1 −0 Original line number Diff line number Diff line Loading @@ -41,6 +41,7 @@ Optional properties : - qcom,disable-dev-mode-pm: If present, it disables PM runtime functionality for device mode. - qcom,disable-host-mode-pm: If present, it disables XHCI PM runtime functionality when USB host mode is used. - qcom,core-clk-rate: If present, indicates clock frequency to be set for USB master clock. Sub nodes: - Sub node for "DWC3- USB3 controller". This sub node is required property for device node. The properties of this subnode Loading
drivers/usb/dwc3/dwc3-msm.c +14 −5 Original line number Diff line number Diff line Loading @@ -2540,14 +2540,23 @@ static int dwc3_msm_get_clk_gdsc(struct dwc3_msm *mdwc) return ret; } if (!of_property_read_u32(mdwc->dev->of_node, "qcom,core-clk-rate", (u32 *)&mdwc->core_clk_rate)) { mdwc->core_clk_rate = clk_round_rate(mdwc->core_clk, mdwc->core_clk_rate); } else { /* * Get Max supported clk frequency for USB Core CLK and request * to set the same. */ mdwc->core_clk_rate = clk_round_rate(mdwc->core_clk, LONG_MAX); } if (IS_ERR_VALUE(mdwc->core_clk_rate)) { dev_err(mdwc->dev, "fail to get core clk max freq.\n"); } else { dev_dbg(mdwc->dev, "USB core frequency = %ld\n", mdwc->core_clk_rate); ret = clk_set_rate(mdwc->core_clk, mdwc->core_clk_rate); if (ret) dev_err(mdwc->dev, "fail to set core_clk freq:%d\n", Loading