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Commit c780c79f authored by David Collins's avatar David Collins
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ARM: dts: msm: use SW closed-loop voltage margins for VDD_APCC on msm8996v3



Change the VDD_APCC CPR open-loop and closed-loop voltage margins
in order to match the optimized values found via characterization
when using software closed-loop CPR.  Also switch from hardware
closed-loop to software closed-loop CPR operation.  This ensures
that software can recalibrate some of the HMSS hardware blocks
after each VDD_APCC CPR up or down voltage step.

Reduce the max floor-to-ceiling voltage range for the lowest
corner of the apc1_vreg regulator in order to guarantee stable
operation of the performance cluster when it resumes from power
collapse.

Characterization has found that VDD_APCC closed-loop CPR
behavior can be improved by using different CPR controller
parameters.  Change the CPR count mode from staggered to all-
at-once minimum with a repetition count of 25.  Also change
the up-threshold to 2 and the consecutive-down count to 3 for
both CPR hardware threads.

Change-Id: I8fe2220bb7976f9e373a93ab525eb6e75184dfe2
Signed-off-by: default avatarDavid Collins <collinsd@codeaurora.org>
parent ff7ec0d1
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