Commit c6ac1e6e authored Feb 27, 2013 by James Hogan

metag: perf: add missing prev_count updates



The prev_count needs setting when changing the counter value, otherwise
the calculated delta will be wrong, which for frequency sampling
(dynamic period sampling) results in sampling at too high a frequency.

For non-interrupting performance counters it should also be cleared when
enabling the counter since the write to the PERF_COUNT register will
clear the perf counter.

This also includes a minor change to remove the u64 cast from the
metag_pmu->write() call as metag_pmu->write() takes a u32 anyway, and in
any case GCC is smart enough to optimise away the cast.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>

parent db59932f

arch/metag/kernel/perf/perf_event.c

+10 −2

Original line number	Diff line number	Diff line
		@@ -240,8 +240,10 @@ int metag_pmu_event_set_period(struct perf_event *event,
		if (left > (s64)metag_pmu->max_period)
		left = metag_pmu->max_period;

		if (metag_pmu->write)
		metag_pmu->write(idx, (u64)(-left) & MAX_PERIOD);
		if (metag_pmu->write) {
		local64_set(&hwc->prev_count, -(s32)left);
		metag_pmu->write(idx, -left & MAX_PERIOD);
		}

		perf_event_update_userpage(event);

		@@ -651,6 +653,12 @@ static void metag_pmu_enable_counter(struct hw_perf_event *event, int idx)
		* set to a specific value that needs preserving.
		*/
		tmp \|= metag_in32(PERF_COUNT(idx)) & 0x00ffffff;
		else
		/*
		* Older cores reset the counter on write, so prev_count needs
		* resetting too so we can calculate a correct delta.
		*/
		local64_set(&event->prev_count, 0);

		metag_out32(tmp, PERF_COUNT(idx));
		unlock: